A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints

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TY  - CONF
  - R. Agarwal, E.M. Popovici, B. O¿Flynn, M.E. O¿Sullivan
  - International Symposium on Circuits and Systems
  - A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints
  - 2007
  - January
  - Validated
  - 1
  - ()
  - 1405
  - 1408
DA  - 2007/01
ER  - 
@inproceedings{V1194778,
   = {R. Agarwal,  E.M. Popovici and  B. O¿Flynn,  M.E. O¿Sullivan },
   = {International Symposium on Circuits and Systems},
   = {{A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints}},
   = {2007},
   = {January},
   = {Validated},
   = {1},
   = {()},
  pages = {1405--1408},
  source = {IRIS}
}
AUTHORSR. Agarwal, E.M. Popovici, B. O¿Flynn, M.E. O¿Sullivan
TITLEInternational Symposium on Circuits and Systems
PUBLICATION_NAMEA Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints
YEAR2007
MONTHJanuary
STATUSValidated
PEER_REVIEW1
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END_PAGE1408
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