Low Cost Error Recovery In Delay-Intolerant Wireless Sensor Networks

Typeset version

 

TY  - JOUR
  - Agarwal, R, Popovici, EM, Sala, M, O'Flynn, B
  - 2007
  - February
  - 2007 European Conference On Circuit Theory and Design, Vols 1-3
  - Low Cost Error Recovery In Delay-Intolerant Wireless Sensor Networks
  - Validated
  - ()
  - -1
  - NA
  - 699
  - 702
  - Transmission efficiency of Wireless Sensor Networks (WSN) is lower than that of conventional networks due to frequent propagation errors. In light of specific features and diverse applications of WSN, common assumptions from communication systems may not hold true and efficient application-specific protocols can be formulated. In this paper, we demonstrate this based on an interesting observation related to shortened Reed-Solomon (RS) codes for packet reliabflity in WSN. We show that multiple instances (gamma) of RS codes defined on a smaller alphabet combined with interleaving result in smaller resource usage while the performance exceeds the benefits of a shortened RS code defined over a larger alphabet In particular, the proposed scheme can have an error correction capability of up to 7 times larger that for the conventional RS scheme without changing the rate of the code with much lower power, timing and memory requirements. Implementation results on 25mm motes developed by Tyndall National Institute show that such a scheme is 43% more power efficient compared to RS scheme with same code rate. Besides, such an approach results in 44% faster computations and 53% reduction in memory required..
DA  - 2007/02
ER  - 
@article{V723038,
   = {Agarwal,  R and  Popovici,  EM and  Sala,  M and  O'Flynn,  B },
   = {2007},
   = {February},
   = {2007 European Conference On Circuit Theory and Design, Vols 1-3},
   = {Low Cost Error Recovery In Delay-Intolerant Wireless Sensor Networks},
   = {Validated},
   = {()},
   = {-1},
   = {NA},
  pages = {699--702},
   = {{Transmission efficiency of Wireless Sensor Networks (WSN) is lower than that of conventional networks due to frequent propagation errors. In light of specific features and diverse applications of WSN, common assumptions from communication systems may not hold true and efficient application-specific protocols can be formulated. In this paper, we demonstrate this based on an interesting observation related to shortened Reed-Solomon (RS) codes for packet reliabflity in WSN. We show that multiple instances (gamma) of RS codes defined on a smaller alphabet combined with interleaving result in smaller resource usage while the performance exceeds the benefits of a shortened RS code defined over a larger alphabet In particular, the proposed scheme can have an error correction capability of up to 7 times larger that for the conventional RS scheme without changing the rate of the code with much lower power, timing and memory requirements. Implementation results on 25mm motes developed by Tyndall National Institute show that such a scheme is 43% more power efficient compared to RS scheme with same code rate. Besides, such an approach results in 44% faster computations and 53% reduction in memory required..}},
  source = {IRIS}
}
AUTHORSAgarwal, R, Popovici, EM, Sala, M, O'Flynn, B
YEAR2007
MONTHFebruary
JOURNAL_CODE2007 European Conference On Circuit Theory and Design, Vols 1-3
TITLELow Cost Error Recovery In Delay-Intolerant Wireless Sensor Networks
STATUSValidated
TIMES_CITED()
SEARCH_KEYWORD
VOLUME-1
ISSUENA
START_PAGE699
END_PAGE702
ABSTRACTTransmission efficiency of Wireless Sensor Networks (WSN) is lower than that of conventional networks due to frequent propagation errors. In light of specific features and diverse applications of WSN, common assumptions from communication systems may not hold true and efficient application-specific protocols can be formulated. In this paper, we demonstrate this based on an interesting observation related to shortened Reed-Solomon (RS) codes for packet reliabflity in WSN. We show that multiple instances (gamma) of RS codes defined on a smaller alphabet combined with interleaving result in smaller resource usage while the performance exceeds the benefits of a shortened RS code defined over a larger alphabet In particular, the proposed scheme can have an error correction capability of up to 7 times larger that for the conventional RS scheme without changing the rate of the code with much lower power, timing and memory requirements. Implementation results on 25mm motes developed by Tyndall National Institute show that such a scheme is 43% more power efficient compared to RS scheme with same code rate. Besides, such an approach results in 44% faster computations and 53% reduction in memory required..
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