Design and Optimisation of A High Current, High Frequency Monolithic Buck Converter

Typeset version

 

TY  - 
  - Other
  - Hannon, J, O'Sullivan, D, Foley, R, Griffiths, J, McCarthy, KG, Egan, MG
  - 2008
  - August
  - Design and Optimisation of A High Current, High Frequency Monolithic Buck Converter
  - Validated
  - 1
  - ()
  - The detailed design and optimisation of a high current monolithic point-of-load (POL) buck converter is presented in this paper. The approach taken is to identify the major design issues which account for power losses and represent them as a function of the power device width. Having identified these loss sources and quantified them, the optimum power device sizes are obtained for a converter with a 20 MHz switching frequency..
  - 1472
  - 1476
DA  - 2008/08
ER  - 
@misc{V722949,
   = {Other},
   = {Hannon,  J and  O'Sullivan,  D and  Foley,  R and  Griffiths,  J and  McCarthy,  KG and  Egan,  MG },
   = {2008},
   = {August},
   = {Design and Optimisation of A High Current, High Frequency Monolithic Buck Converter},
   = {Validated},
   = {1},
   = {()},
   = {{The detailed design and optimisation of a high current monolithic point-of-load (POL) buck converter is presented in this paper. The approach taken is to identify the major design issues which account for power losses and represent them as a function of the power device width. Having identified these loss sources and quantified them, the optimum power device sizes are obtained for a converter with a 20 MHz switching frequency..}},
  pages = {1472--1476},
  source = {IRIS}
}
OTHER_PUB_TYPEOther
AUTHORSHannon, J, O'Sullivan, D, Foley, R, Griffiths, J, McCarthy, KG, Egan, MG
YEAR2008
MONTHAugust
TITLEDesign and Optimisation of A High Current, High Frequency Monolithic Buck Converter
RESEARCHER_ROLE
STATUSValidated
PEER_REVIEW1
TIMES_CITED()
SEARCH_KEYWORD
REFERENCE
ABSTRACTThe detailed design and optimisation of a high current monolithic point-of-load (POL) buck converter is presented in this paper. The approach taken is to identify the major design issues which account for power losses and represent them as a function of the power device width. Having identified these loss sources and quantified them, the optimum power device sizes are obtained for a converter with a 20 MHz switching frequency..
PUBLISHER_LOCATION
PUBLISHER
EDITORS
ISBN_ISSN
EDITION
URL
START_PAGE1472
END_PAGE1476
DOI_LINK
FUNDING_BODY
GRANT_DETAILS