Φ-SYNC: A Precurrent-Balancing Fast Phase-Adding Strategy for Multiphase VRMs in Data-Center Processors

Multiphase voltage regulator modules (VRMs) for high-current data-center processors commonly employ phase shedding to improve light-load efficiency. However, during step-up load transients from a phase-shedding state, conventional fast phase adding restores full-phase interleaving without actively compensating the large current gap between previously active and previously idle phases. This gap is then corrected only slowly by the current-sharing loop, which can increase the peak phase current and worsen the voltage undershoot. This article proposes a fast phase-adding strategy with precurrent balancing, termed phase synchronization (Φ-SYNC). When a step-up transient is detected while some phases are idle, Φ-SYNC temporarily overrides the idle-phase PWM/on-time commands and applies a controlled constant-on interval so that their inductor currents rapidly approach those of the previously active phases before returning to normal full-phase operation. If the transient ends early, a short residual compensation is completed in subsequent cycles. Φ-SYNC is implemented purely in firmware on a 16-phase VRM prototype and is evaluated against a baseline pulse-distribution-based current-mode constant-on-time scheme implementation and commercial controllers using the same power stage and printed circuit board (PCB) layout. Experiments under representative server-class transients show submicrosecond current equalization, reduced peak phase current, and improved undershoot without hardware modification. Additional 12-phase comparisons, expanded-condition tests, and a fixed-frequency digitally controlled VRM simulation further support its effectiveness and practical applicability.