3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters

A. Vandooren; Z. Wu; N. Parihar; J. Franco; B. Parvais; P. Matagne; H. Debruyn; G. Mannaert; K. Devriendt; L. Teugels; E. Vecchio; D. Radisic; E. Rosseel; A. Hikavyy; B. T. Chan; N. Waldron; J. Mitard; G. Besnard; A. Alvarez; G. Gaudin; W. Schwarzenbach; I. Radu; B. Y. Nguyen; K. Huet; T. Tabata; F. Mazzamuto; S. Demuynck; J. Boemmels; N. Collaert; N. Horiguchi

doi:10.1109/VLSITechnology18217.2020.9265026

3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters

A. Vandooren
, Z. Wu
, N. Parihar
, J. Franco
, B. Parvais
, P. Matagne
, H. Debruyn
, G. Mannaert
, K. Devriendt
, L. Teugels
, E. Vecchio
, D. Radisic
, E. Rosseel
, A. Hikavyy
, B. T. Chan
, N. Waldron
, J. Mitard
, G. Besnard
, A. Alvarez
, G. Gaudin

W. Schwarzenbach, I. Radu, B. Y. Nguyen, K. Huet, T. Tabata, F. Mazzamuto, S. Demuynck, J. Boemmels, N. Collaert, N. Horiguchi

Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review

Abstract

Top tier devices in a 3D sequential integration are optimized using a low temperature process flow (< 525°C}). Bi-axial tensile strained silicon is transferred without strain relaxation to boost the top tier nmos device performance by 40-50% over the unstrained silicon devices, recovering the performance loss from the low temperature processing when using extension-less device integration. Excimer laser anneal is also shown to effectively activate both n-type and p-type dopants in the extension of thin silicon film devices using optimized, CMOS compatible, laser exposure conditions. Laser anneal is fully compatible with a replacement metal gate (RMG) process flow and with selective source/drain (SD) epitaxy. The dopant activation level is preserved during the entire process flow which results in similar Ion Ioff device performance for devices with laser and spike anneals. Excimer laser anneal benefits also from improved control short channel effects over spike annealing due to low dopant diffusion.

Original language	English
Title of host publication	2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728164601
DOIs	https://doi.org/10.1109/VLSITechnology18217.2020.9265026
Publication status	Published - Jun 2020
Externally published	Yes
Event	2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Honolulu, United States Duration: 16 Jun 2020 → 19 Jun 2020

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2020-June
ISSN (Print)	0743-1562

Conference

Conference	2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020
Country/Territory	United States
City	Honolulu
Period	16/06/20 → 19/06/20

Access to Document

10.1109/VLSITechnology18217.2020.9265026

Cite this

Vandooren, A., Wu, Z., Parihar, N., Franco, J., Parvais, B., Matagne, P., Debruyn, H., Mannaert, G., Devriendt, K., Teugels, L., Vecchio, E., Radisic, D., Rosseel, E., Hikavyy, A., Chan, B. T., Waldron, N., Mitard, J., Besnard, G., Alvarez, A., ... Horiguchi, N. (2020). 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters. In 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings Article 9265026 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2020-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSITechnology18217.2020.9265026

Vandooren, A. ; Wu, Z. ; Parihar, N. et al. / 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters. 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{e827da06b79e4a46a7181126d63c6524,

title = "3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters",

abstract = "Top tier devices in a 3D sequential integration are optimized using a low temperature process flow (< 525°C\}). Bi-axial tensile strained silicon is transferred without strain relaxation to boost the top tier nmos device performance by 40-50\% over the unstrained silicon devices, recovering the performance loss from the low temperature processing when using extension-less device integration. Excimer laser anneal is also shown to effectively activate both n-type and p-type dopants in the extension of thin silicon film devices using optimized, CMOS compatible, laser exposure conditions. Laser anneal is fully compatible with a replacement metal gate (RMG) process flow and with selective source/drain (SD) epitaxy. The dopant activation level is preserved during the entire process flow which results in similar Ion Ioff device performance for devices with laser and spike anneals. Excimer laser anneal benefits also from improved control short channel effects over spike annealing due to low dopant diffusion.",

author = "A. Vandooren and Z. Wu and N. Parihar and J. Franco and B. Parvais and P. Matagne and H. Debruyn and G. Mannaert and K. Devriendt and L. Teugels and E. Vecchio and D. Radisic and E. Rosseel and A. Hikavyy and Chan, \{B. T.\} and N. Waldron and J. Mitard and G. Besnard and A. Alvarez and G. Gaudin and W. Schwarzenbach and I. Radu and Nguyen, \{B. Y.\} and K. Huet and T. Tabata and F. Mazzamuto and S. Demuynck and J. Boemmels and N. Collaert and N. Horiguchi",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 ; Conference date: 16-06-2020 Through 19-06-2020",

year = "2020",

month = jun,

doi = "10.1109/VLSITechnology18217.2020.9265026",

language = "English",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings",

address = "United States",

}

Vandooren, A, Wu, Z, Parihar, N, Franco, J, Parvais, B, Matagne, P, Debruyn, H, Mannaert, G, Devriendt, K, Teugels, L, Vecchio, E, Radisic, D, Rosseel, E, Hikavyy, A, Chan, BT, Waldron, N, Mitard, J, Besnard, G, Alvarez, A, Gaudin, G, Schwarzenbach, W, Radu, I, Nguyen, BY, Huet, K, Tabata, T, Mazzamuto, F, Demuynck, S, Boemmels, J, Collaert, N & Horiguchi, N 2020, 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters. in 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings., 9265026, Digest of Technical Papers - Symposium on VLSI Technology, vol. 2020-June, Institute of Electrical and Electronics Engineers Inc., 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020, Honolulu, United States, 16/06/20. https://doi.org/10.1109/VLSITechnology18217.2020.9265026

3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters. / Vandooren, A.; Wu, Z.; Parihar, N. et al.
2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. 9265026 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2020-June).

Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review

TY - GEN

T1 - 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters

AU - Vandooren, A.

AU - Wu, Z.

AU - Parihar, N.

AU - Franco, J.

AU - Parvais, B.

AU - Matagne, P.

AU - Debruyn, H.

AU - Mannaert, G.

AU - Devriendt, K.

AU - Teugels, L.

AU - Vecchio, E.

AU - Radisic, D.

AU - Rosseel, E.

AU - Hikavyy, A.

AU - Chan, B. T.

AU - Waldron, N.

AU - Mitard, J.

AU - Besnard, G.

AU - Alvarez, A.

AU - Gaudin, G.

AU - Schwarzenbach, W.

AU - Radu, I.

AU - Nguyen, B. Y.

AU - Huet, K.

AU - Tabata, T.

AU - Mazzamuto, F.

AU - Demuynck, S.

AU - Boemmels, J.

AU - Collaert, N.

AU - Horiguchi, N.

PY - 2020/6

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N2 - Top tier devices in a 3D sequential integration are optimized using a low temperature process flow (< 525°C}). Bi-axial tensile strained silicon is transferred without strain relaxation to boost the top tier nmos device performance by 40-50% over the unstrained silicon devices, recovering the performance loss from the low temperature processing when using extension-less device integration. Excimer laser anneal is also shown to effectively activate both n-type and p-type dopants in the extension of thin silicon film devices using optimized, CMOS compatible, laser exposure conditions. Laser anneal is fully compatible with a replacement metal gate (RMG) process flow and with selective source/drain (SD) epitaxy. The dopant activation level is preserved during the entire process flow which results in similar Ion Ioff device performance for devices with laser and spike anneals. Excimer laser anneal benefits also from improved control short channel effects over spike annealing due to low dopant diffusion.

AB - Top tier devices in a 3D sequential integration are optimized using a low temperature process flow (< 525°C}). Bi-axial tensile strained silicon is transferred without strain relaxation to boost the top tier nmos device performance by 40-50% over the unstrained silicon devices, recovering the performance loss from the low temperature processing when using extension-less device integration. Excimer laser anneal is also shown to effectively activate both n-type and p-type dopants in the extension of thin silicon film devices using optimized, CMOS compatible, laser exposure conditions. Laser anneal is fully compatible with a replacement metal gate (RMG) process flow and with selective source/drain (SD) epitaxy. The dopant activation level is preserved during the entire process flow which results in similar Ion Ioff device performance for devices with laser and spike anneals. Excimer laser anneal benefits also from improved control short channel effects over spike annealing due to low dopant diffusion.

UR - https://www.scopus.com/pages/publications/85098175126

U2 - 10.1109/VLSITechnology18217.2020.9265026

DO - 10.1109/VLSITechnology18217.2020.9265026

M3 - Conference proceeding

AN - SCOPUS:85098175126

T3 - Digest of Technical Papers - Symposium on VLSI Technology

BT - 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020

Y2 - 16 June 2020 through 19 June 2020

ER -

Vandooren A, Wu Z, Parihar N, Franco J, Parvais B, Matagne P et al. 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters. In 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2020. 9265026. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSITechnology18217.2020.9265026

3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters

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