400 Gbit/s (10 channel × 40 Gbit/s) DWDM photonic integrated circuits

  • R. Nagarajan
  • , M. Kato
  • , V. G. Dominic
  • , C. H. Joyner
  • , R. P. Schneider
  • , A. G. Dentai
  • , T. Desikan
  • , P. W. Evans
  • , M. Kauffman
  • , D. J.H. Lambert
  • , S. K. Mathis
  • , A. Mathur
  • , M. L. Mitchell
  • , M. J. Missey
  • , S. Murthy
  • , A. C. Nilsson
  • , F. H. Peters
  • , J. L. Pleumeekers
  • , R. A. Salvatore
  • , R. B. Taylor
  • M. F. Van Leeuwen, J. Webjorn, M. Ziari, S. G. Grubb, D. Perkins, M. Reffle, D. G. Mehuys, F. A. Kish, D. F. Welch

Research output: Contribution to journalArticlepeer-review

Abstract

A ten channel transmitter and receiver dense wavelength division multiplexing (DWDM) photonic integrated circuit (PIC) pair was presented that was capable of transmitting and receiving data at 40 Gbit/s per channel. Each transmit channel consisted of a tunable distributed feedback (DFB) laser with an integrated back facet power monitor and a variable optical attenuator (VOA). It was found that the responses for all the ten channels in both the transmitter and receiver photonic circuits were overlaid over one another and were very uniform across the DWDM PICs. The results show that highly integrated transmitter and receiver PIC chips were suitable for ten channel DWDM data communication at an aggregate rate of 400 Gbit/s.

Original languageEnglish
Pages (from-to)347-349
Number of pages3
JournalElectronics Letters
Volume41
Issue number6
DOIs
Publication statusPublished - 17 Mar 2005
Externally publishedYes

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