@inproceedings{62d4edbd99ce4ee2a6c0c42e63290559,
title = "A 31.25 MHz bandwidth 52.4 dB SNDR VCO based ADC with on-chip non-linearity correction",
abstract = "This paper introduces a method aimed at rectifying nonlinearities in analog-to-digital converters (ADCs) based on voltage-controlled oscillators (VCOs). The proposed approach employs a straightforward digital logic circuit, three single-stage transistor-based circuits, and four switches to augment the linearity of the VCO tuning curve. Experimental findings from a 1.2 V, 65 nm CMOS pseudo-differential ADC reveal a no table 2. 5-bit improvement in the Effective Number of Bits (ENOB), with only marginal increases of 5.2\% and 9\% in total power and area, respectively.",
keywords = "ADC, noise-shaping, non-linearity, VCO",
author = "A. Purushothaman and Subhash Chevella and Brannick Paraic and Ivan O'Connell",
note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025 ; Conference date: 25-05-2025 Through 28-05-2025",
year = "2025",
doi = "10.1109/ISCAS56072.2025.11043730",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings",
address = "United States",
}