A 500 kS/s 71.8 dB 5.7 fJ/Conv-step Switch Supply Based Comparator SAR ADC for Biomedical Portable Devices

Research output: Chapter in Book/Report/Conference proceedingsConference proceedingpeer-review

Abstract

This paper introduces a switch supply dynamic comparator that, by means of a reservoir capacitor, exhibits a reduced effective supply voltage during the decision phase without requiring a dedicated DC-DC down converter, pin, or external supply rail. The proposed switch supply comparator achieves a 28% reduction in power consumption compared to the conventional dynamic comparator design. An ultra-low-power 14-bit SAR ADC is implemented using the proposed switch supply comparator, where the bootstrap switch is also replaced with a clock-boosting switch, enabling further power consumption reduction without compromising the achievable SNDR. The ADC was fabricated in 65 nm CMOS and consumes 9.14 μW from a 1 V supply and achieves a constant SNDR of 71.7 dB from DC to 0.5 MS/s. The resulting resolution, speed and state of the art Walden FoM of 5.7 fJ/Conv make this ADC suitable for low-power portable biomedical devices.

Original languageEnglish
Title of host publicationBioCAS 2023 - 2023 IEEE Biomedical Circuits and Systems Conference, Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350300260
DOIs
Publication statusPublished - 2023
Event2023 IEEE Biomedical Circuits and Systems Conference, BioCAS 2023 - Toronto, Canada
Duration: 19 Oct 202321 Oct 2023

Publication series

NameBioCAS 2023 - 2023 IEEE Biomedical Circuits and Systems Conference, Conference Proceedings

Conference

Conference2023 IEEE Biomedical Circuits and Systems Conference, BioCAS 2023
Country/TerritoryCanada
CityToronto
Period19/10/2321/10/23

Keywords

  • clock boosting circuit
  • Custom MoM Capacitor
  • SAR ADC
  • split array CDAC
  • switch supply comparator

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