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A Background Jitter Calibration for ADCs Using TDC Phase Information From ADPLL
Haoyang Shen
, Hao Zheng
,
Daniel O’Hare
, Deepu John
, Barry Cardiff
Tyndall
Tyndall Photonics
Tyndall MCCI
University College Dublin
Research output
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peer-review
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Engineering
Phase Locked Loop
100%
Analog-to-Digital Converter
100%
Digital Converter
100%
Phase Information
100%
Metrics
16%
Phase Noise
16%
Systems Performance
16%
Fits and Tolerances
16%
Oscillator
16%
Sampling Clock
16%
Clock Signal
16%
Sampling Error
16%
Least Squares Method
16%
Computer Science
Analog-to-Digital Converter
100%
Digital Converter
100%
Phase Locked Loop
100%
Phase Information
100%
Power Efficient
16%
Least Squares Method
16%
Performance Metric
16%
Systems Performance
16%
Sampling Error
16%
Uniform Sampling
16%
Estimation Algorithm
16%