Skip to main navigation Skip to search Skip to main content

A Counting Based Bridge to Digital Converter Achieving a Walden FoM of 0.048 nJ/Conv-Step

Research output: Chapter in Book/Report/Conference proceedingsConference proceedingpeer-review

Abstract

This paper presents a counting based BDC for environmental monitoring based IoT applications, where the ramp is generated with a compact and power efficient switched capacitor DAC. This DAC is realized using a single switched capacitor resistor, eliminating the source of any mismatch. The BDC is fabricated in 65 nm CMOS and occupies an area of 0.014 mm2. It has a wide input range of 830 mV and achieves an SNR of 49.97 dB and 65.6 dB, for dynamic and static inputs respectively. The BDC consumes 30 μ A with a 0.41 ms conversion time, resulting in a Walden FoM of 0.048 n.J/Conv-step.

Original languageEnglish
Title of host publication2024 31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350377200
DOIs
Publication statusPublished - 2024
Event31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024 - Nancy, France
Duration: 18 Nov 202420 Nov 2024

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
ISSN (Print)2994-5755
ISSN (Electronic)2995-0589

Conference

Conference31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024
Country/TerritoryFrance
CityNancy
Period18/11/2420/11/24

Keywords

  • Analog-to-digital converter
  • bridge-to-digital converter (BDC)
  • Dual-slope converter
  • Single-slope converter
  • switched capacitor DAC
  • Wheatstone bridge (WhB)

Fingerprint

Dive into the research topics of 'A Counting Based Bridge to Digital Converter Achieving a Walden FoM of 0.048 nJ/Conv-Step'. Together they form a unique fingerprint.

Cite this