A defect characterization technique for the sidewall surface of Nano-ridge and Nanowire based Logic and RF technologies

  • A. Vais
  • , B. Hsu
  • , O. Syshchyk
  • , H. Yu
  • , A. Alian
  • , Y. Mols
  • , K. V. Kodandarama
  • , B. Kunert
  • , N. Waldron
  • , E. Simoen
  • , N. Collaert

Research output: Chapter in Book/Report/Conference proceedingsChapterpeer-review

Abstract

We introduce a set of new characterization techniques for the direct defect analysis of the sidewall surfaces of Nano-ridge, Nanowire, and FinFET based devices, being used in current (and future) logic and RF technologies. We demonstrate the application of these techniques on GaAs mesa, Nano-ridge, and InGaAs nano-wire based PIN diodes where surface defect densities are difficult to extract currently. We show that a close match in extracted density, with both measured data and calibrated TCAD simulations of above device types, is achieved validating the applicability of the techniques.

Original languageEnglish
Title of host publication2021 IEEE International Reliability Physics Symposium, IRPS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728168937
DOIs
Publication statusPublished - Mar 2021
Externally publishedYes
Event2021 IEEE International Reliability Physics Symposium, IRPS 2021 - Virtual, Monterey, United States
Duration: 21 Mar 202124 Mar 2021

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
Volume2021-March
ISSN (Print)1541-7026

Conference

Conference2021 IEEE International Reliability Physics Symposium, IRPS 2021
Country/TerritoryUnited States
CityVirtual, Monterey
Period21/03/2124/03/21

Keywords

  • Hetero-junction Bipolar transistor
  • III-V
  • III-V defects
  • Nano-ridge devices
  • Nano-wire sidewall defects

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