TY - JOUR
T1 - A flexible processor for the characteristic 3 ηT pairing
AU - Ronan, Robert
AU - Murphy, Colin
AU - Kerins, Tim
AU - Ó.hÉigeartaigh, Colm
AU - Barreto, Paulo S.L.M.
PY - 2007
Y1 - 2007
N2 - The ητ pairing is an efficient method for the calculation of the Tate pairing. In this paper, we describe the hardware implementation of the ητ pairing on a supersingular elliptic curve of characteristic 3. All characteristic 3 operations required for the computation of the pairing are outlined in detail. We describe how the required extension field operations can be performed in terms of subfield operations, many of which can be computed in parallel in hardware. The hardware architectures required for pairing computation are also described. An efficient and reconfigurable processor utilising these hardware architectures is presented and discussed. The processor is highly reconfigurable and can easily be tailored for a low area implementation, or for a high throughput implementation or for a desired balance between the two. Results are provided for various configurations of the processor when implemented over the field F397 on an FPGA.
AB - The ητ pairing is an efficient method for the calculation of the Tate pairing. In this paper, we describe the hardware implementation of the ητ pairing on a supersingular elliptic curve of characteristic 3. All characteristic 3 operations required for the computation of the pairing are outlined in detail. We describe how the required extension field operations can be performed in terms of subfield operations, many of which can be computed in parallel in hardware. The hardware architectures required for pairing computation are also described. An efficient and reconfigurable processor utilising these hardware architectures is presented and discussed. The processor is highly reconfigurable and can easily be tailored for a low area implementation, or for a high throughput implementation or for a desired balance between the two. Results are provided for various configurations of the processor when implemented over the field F397 on an FPGA.
KW - characteristic 3
KW - elliptic curve
KW - reconfigurable processor
KW - η pairing
UR - https://www.scopus.com/pages/publications/52149093742
U2 - 10.1504/IJHPSA.2007.015393
DO - 10.1504/IJHPSA.2007.015393
M3 - Article
AN - SCOPUS:52149093742
SN - 1751-6528
VL - 1
SP - 79
EP - 88
JO - International Journal of High Performance Systems Architecture
JF - International Journal of High Performance Systems Architecture
IS - 2
ER -