TY - GEN
T1 - A GF(24m) inverter and its application in a reconfigurable Tate pairing processor
AU - Keller, Maurice
AU - Ronan, Robert
AU - Marnane, William
AU - Murphy, Colin
PY - 2006
Y1 - 2006
N2 - This paper details an architecture for performing inversion in the field GF(24m), which is the field used in computing the Tate pairing on characteristic 2 supersingular elliptic curves. The inverter architecture is then used to improve the performance of a reconfigurable Tate pairing hardware accelerator. Implementation results for the improved processor on an FPGA are presented and compared to those of the basic processor without the inverter.
AB - This paper details an architecture for performing inversion in the field GF(24m), which is the field used in computing the Tate pairing on characteristic 2 supersingular elliptic curves. The inverter architecture is then used to improve the performance of a reconfigurable Tate pairing hardware accelerator. Implementation results for the improved processor on an FPGA are presented and compared to those of the basic processor without the inverter.
UR - https://www.scopus.com/pages/publications/46449102758
U2 - 10.1109/RECONF.2006.307766
DO - 10.1109/RECONF.2006.307766
M3 - Conference proceeding
AN - SCOPUS:46449102758
SN - 1424406900
SN - 9781424406906
T3 - Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006
SP - 158
EP - 167
BT - Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006
T2 - 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006
Y2 - 20 September 2006 through 22 September 2006
ER -