A low-power pairing-based cryptographic accelerator for embedded security applications

Tom English; Maurice Keller; Ka Lok Man; Emanuel Popovici; Michel Schellekens; William Marnane

doi:10.1109/SOCCON.2009.5398017

A low-power pairing-based cryptographic accelerator for embedded security applications

Tom English
, Maurice Keller
, Ka Lok Man
, Emanuel Popovici
, Michel Schellekens
, William Marnane

University College Cork

Research output: Chapter in Book/Report/Conference proceedings › Chapter › peer-review

Abstract

We report on the implementation of an IP core for Pairing-based cryptography. The core performs an elliptic curve cryptographic operation called the Tate Pairing over the field GF(2²⁵¹). In this paper, we describe the implementation of the design in TSMC 65nm GP CMOS standard cells and the optimisations made for low-power operation. The resulting core computes the pairing in 1.5ms and consumes less than 4mW.

Original language	English
Title of host publication	Proceedings - IEEE International SOC Conference, SOCC 2009
Pages	369-372
Number of pages	4
DOIs	https://doi.org/10.1109/SOCCON.2009.5398017
Publication status	Published - 2009
Event	IEEE International SOC Conference, SOCC 2009 - Belfast, Ireland Duration: 9 Sep 2009 → 11 Sep 2009

Publication series

Name	Proceedings - IEEE International SOC Conference, SOCC 2009

Conference

Conference	IEEE International SOC Conference, SOCC 2009
Country/Territory	Ireland
City	Belfast
Period	9/09/09 → 11/09/09

Access to Document

10.1109/SOCCON.2009.5398017

Cite this

English, T., Keller, M., Man, K. L., Popovici, E., Schellekens, M., & Marnane, W. (2009). A low-power pairing-based cryptographic accelerator for embedded security applications. In Proceedings - IEEE International SOC Conference, SOCC 2009 (pp. 369-372). Article 5398017 (Proceedings - IEEE International SOC Conference, SOCC 2009). https://doi.org/10.1109/SOCCON.2009.5398017

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title = "A low-power pairing-based cryptographic accelerator for embedded security applications",

abstract = "We report on the implementation of an IP core for Pairing-based cryptography. The core performs an elliptic curve cryptographic operation called the Tate Pairing over the field GF(2251). In this paper, we describe the implementation of the design in TSMC 65nm GP CMOS standard cells and the optimisations made for low-power operation. The resulting core computes the pairing in 1.5ms and consumes less than 4mW.",

author = "Tom English and Maurice Keller and Man, \{Ka Lok\} and Emanuel Popovici and Michel Schellekens and William Marnane",

year = "2009",

doi = "10.1109/SOCCON.2009.5398017",

language = "English",

isbn = "9781424452200",

series = "Proceedings - IEEE International SOC Conference, SOCC 2009",

pages = "369--372",

booktitle = "Proceedings - IEEE International SOC Conference, SOCC 2009",

note = "IEEE International SOC Conference, SOCC 2009 ; Conference date: 09-09-2009 Through 11-09-2009",

}

English, T, Keller, M, Man, KL, Popovici, E, Schellekens, M & Marnane, W 2009, A low-power pairing-based cryptographic accelerator for embedded security applications. in Proceedings - IEEE International SOC Conference, SOCC 2009., 5398017, Proceedings - IEEE International SOC Conference, SOCC 2009, pp. 369-372, IEEE International SOC Conference, SOCC 2009, Belfast, Ireland, 9/09/09. https://doi.org/10.1109/SOCCON.2009.5398017

A low-power pairing-based cryptographic accelerator for embedded security applications. / English, Tom; Keller, Maurice; Man, Ka Lok et al.
Proceedings - IEEE International SOC Conference, SOCC 2009. 2009. p. 369-372 5398017 (Proceedings - IEEE International SOC Conference, SOCC 2009).

Research output: Chapter in Book/Report/Conference proceedings › Chapter › peer-review

TY - CHAP

T1 - A low-power pairing-based cryptographic accelerator for embedded security applications

AU - English, Tom

AU - Keller, Maurice

AU - Man, Ka Lok

AU - Popovici, Emanuel

AU - Schellekens, Michel

AU - Marnane, William

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AB - We report on the implementation of an IP core for Pairing-based cryptography. The core performs an elliptic curve cryptographic operation called the Tate Pairing over the field GF(2251). In this paper, we describe the implementation of the design in TSMC 65nm GP CMOS standard cells and the optimisations made for low-power operation. The resulting core computes the pairing in 1.5ms and consumes less than 4mW.

UR - https://www.scopus.com/pages/publications/77949611279

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DO - 10.1109/SOCCON.2009.5398017

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AN - SCOPUS:77949611279

SN - 9781424452200

T3 - Proceedings - IEEE International SOC Conference, SOCC 2009

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BT - Proceedings - IEEE International SOC Conference, SOCC 2009

T2 - IEEE International SOC Conference, SOCC 2009

Y2 - 9 September 2009 through 11 September 2009

ER -

A low-power pairing-based cryptographic accelerator for embedded security applications

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