A simple figure of merit to identify the first layer to degrade and fail in dual layer SiOx/HfO2 gate dielectric stacks

Research output: Contribution to journalArticlepeer-review

Abstract

Understanding the degradation dynamics and the breakdown sequence of a bilayer high-k (HK) gate dielectric stack is crucial for the improvement of device reliability. We present a new Figure of Merit (FoM), the IL/HK Degradation Index, that depends on fundamental materials properties (the dielectric breakdown strength and the dielectric constant) and can be used to easily and quickly identify the first layer to degrade and fail in a bilayer SiO2/HK dielectric stack. Its dependence on IL and HK material parameters is investigated and its validity is demonstrated by means of accurate physics-based simulations of the degradation process. The proposed FoM can be easily used to understand the degradation dynamics of the gate dielectric stack, providing critical insights for device reliability improvement.

Original languageEnglish
Article number112080
JournalMicroelectronic Engineering
Volume281
DOIs
Publication statusPublished - 15 Sep 2023
Externally publishedYes

Keywords

  • Device simulations
  • Dielectric breakdown
  • Ginestra(R)
  • High-k dielectrics
  • Reliability

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