TY - CHAP
T1 - A Study on a Tether-Less Approach Towards Micro-Transfer-Printing of Large-Footprint Power Micro-Inductor Chiplets
AU - Pal, Somnath
AU - Ye, Liang
AU - O'Callaghan, James
AU - Atar, Fatih Bilge
AU - O'Mathuna, Cian
AU - Corbett, Brian
AU - Sai, Ranajit
AU - Khan, Sambuddha
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - In recent years, need for large-scale, multi-layer, high-capacity integration for electronic systems has sky-rocketed. In this regard, a novel heterogeneous integration technique called Micro-transfer-printing (μTP) has attracted a lot of attention due to its unique ability to integrate chiplets from heterogeneous sources on to a target substrate. Typically, the chiplets are picked up from a donor substrate using an elastomer stamp by breaking the surrounding micro-tethers and then printed onto a target substrate for further processing. Despite its success in applications like sensors, photovoltaics, photonics, etc., μ TP finds its limitation in handling chiplet dimensions larger than 100 x 100x 20μ m3. Therefore, reports on μTP of passive components like micro-inductors and micro-transformers with dimension in mm x mm and thickness of 100s of μm are non-existent. In this paper, a completely novel, non-classical, tether-less approach has been demonstrated for micro-inductors with large footprint. This paper also reports a customized PDMS stamp fabrication and optimized post-fabrication sample preparation steps, such as, substrate thinning and polishing while retaining device performance intact.
AB - In recent years, need for large-scale, multi-layer, high-capacity integration for electronic systems has sky-rocketed. In this regard, a novel heterogeneous integration technique called Micro-transfer-printing (μTP) has attracted a lot of attention due to its unique ability to integrate chiplets from heterogeneous sources on to a target substrate. Typically, the chiplets are picked up from a donor substrate using an elastomer stamp by breaking the surrounding micro-tethers and then printed onto a target substrate for further processing. Despite its success in applications like sensors, photovoltaics, photonics, etc., μ TP finds its limitation in handling chiplet dimensions larger than 100 x 100x 20μ m3. Therefore, reports on μTP of passive components like micro-inductors and micro-transformers with dimension in mm x mm and thickness of 100s of μm are non-existent. In this paper, a completely novel, non-classical, tether-less approach has been demonstrated for micro-inductors with large footprint. This paper also reports a customized PDMS stamp fabrication and optimized post-fabrication sample preparation steps, such as, substrate thinning and polishing while retaining device performance intact.
KW - heterogeneous integration
KW - large-footprint chiplet
KW - micro-inductor
KW - micro-transfer-printing
KW - PDMS stamp
KW - tether-less
KW - μTP
UR - https://www.scopus.com/pages/publications/85165618347
U2 - 10.1109/3DIC57175.2023.10155034
DO - 10.1109/3DIC57175.2023.10155034
M3 - Chapter
AN - SCOPUS:85165618347
T3 - 3DIC 2023 - IEEE International 3D Systems Integration Conference
BT - 3DIC 2023 - IEEE International 3D Systems Integration Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2023 IEEE International 3D Systems Integration Conference, 3DIC 2023
Y2 - 10 May 2023 through 12 May 2023
ER -