An embedded processor for a pairing-based cryptosystem

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Abstract

In recent times bilinear pairings have been instrumental in the design of many new cryptographic protocols and have provided elegant solutions to existing protocol problems. The η pairing is one such pairing and is an efficient computation technique based on a generalization of the Duursma Lee method for calculating the Tate pairing. The pairing can be computed very efficiently on genus 2 hyperelliptic curves. In this paper it is demonstrated that this pairing operation is well suited to a dedicated parallel hardware implementation on an FPGA. An η pairing processor is described in detail and the architectures required for such a system are discussed. Prototype implementation results are presented over a base field of double-struck F sign2103 and the advantages of implementing the pairing on the dedicated processor are discussed.

Original languageEnglish
Title of host publicationProceedings - Third International Conference onInformation Technology
Subtitle of host publicationNew Generations, ITNG 2006
Pages192-197
Number of pages6
DOIs
Publication statusPublished - 2006
EventThird International Conference on Information Technology: New Generations, ITNG 2006 - Las Vegas, NV, United States
Duration: 10 Apr 200612 Apr 2006

Publication series

NameProceedings - Third International Conference onInformation Technology: New Generations, ITNG 2006
Volume2006

Conference

ConferenceThird International Conference on Information Technology: New Generations, ITNG 2006
Country/TerritoryUnited States
CityLas Vegas, NV
Period10/04/0612/04/06

Keywords

  • η pairing
  • Characteristic 2
  • Dedicated processor
  • Genus 2 hyperelliptic
  • Pairing-based cryptosystem

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