An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

N. Waldron; C. Merckling; W. Guo; P. Ong; L. Teugels; S. Ansar; D. Tsvetanova; F. Sebaai; D. H. Van Dorp; A. Milenin; D. Lin; L. Nyns; J. Mitard; A. Pourghaderi; B. Douhard; O. Richard; H. Bender; G. Boccardi; M. Caymax; M. Heyns; W. Vandervorst; K. Barla; N. Collaert; A. V.Y. Thean

doi:10.1109/VLSIT.2014.6894349

An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

N. Waldron
, C. Merckling
, W. Guo
, P. Ong
, L. Teugels
, S. Ansar
, D. Tsvetanova
, F. Sebaai
, D. H. Van Dorp
, A. Milenin
, D. Lin
, L. Nyns
, J. Mitard
, A. Pourghaderi
, B. Douhard
, O. Richard
, H. Bender
, G. Boccardi
, M. Caymax
, M. Heyns

W. Vandervorst, K. Barla, N. Collaert, A. V.Y. Thean

Interuniversitair Micro-Elektronica Centrum
BASF

Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review

Abstract

InGaAs FinFETs fabricated by an unique Si fin replacement process have been demonstrated on 300mm Si substrates. The devices are integrated by process modules developed for a Si-IIIV hybrid 300mm R&D pilot line, compatible for future CMOS high-volume manufacturing. First devices with a SS of 190 mV/dec and extrinsic gm of 558 μS/μm are achieved for an EOT of 1.9nm, L_g of 50nm and fin width of 55nm. A trade-off between off state leakage and mobility for different p-type doping levels of the InP and InGaAs layers is found and the RMG high-κ last processing is demonstrated to offer significant performance improvements over that of high-κ first.

Original language	English
Title of host publication	Digest of Technical Papers - Symposium on VLSI Technology
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479933310
DOIs	https://doi.org/10.1109/VLSIT.2014.6894349
Publication status	Published - 8 Sept 2014
Externally published	Yes
Event	34th Symposium on VLSI Technology, VLSIT 2014 - Honolulu, United States Duration: 9 Jun 2014 → 12 Jun 2014

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)	0743-1562

Conference

Conference	34th Symposium on VLSI Technology, VLSIT 2014
Country/Territory	United States
City	Honolulu
Period	9/06/14 → 12/06/14

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 9 Industry, Innovation, and Infrastructure

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10.1109/VLSIT.2014.6894349

Cite this

Waldron, N., Merckling, C., Guo, W., Ong, P., Teugels, L., Ansar, S., Tsvetanova, D., Sebaai, F., Van Dorp, D. H., Milenin, A., Lin, D., Nyns, L., Mitard, J., Pourghaderi, A., Douhard, B., Richard, O., Bender, H., Boccardi, G., Caymax, M., ... Thean, A. V. Y. (2014). An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates. In Digest of Technical Papers - Symposium on VLSI Technology Article 6894349 (Digest of Technical Papers - Symposium on VLSI Technology). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIT.2014.6894349

@inproceedings{ae3819b985fe41f8b66b7bacda4469c4,

title = "An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates",

abstract = "InGaAs FinFETs fabricated by an unique Si fin replacement process have been demonstrated on 300mm Si substrates. The devices are integrated by process modules developed for a Si-IIIV hybrid 300mm R\&D pilot line, compatible for future CMOS high-volume manufacturing. First devices with a SS of 190 mV/dec and extrinsic gm of 558 μS/μm are achieved for an EOT of 1.9nm, Lg of 50nm and fin width of 55nm. A trade-off between off state leakage and mobility for different p-type doping levels of the InP and InGaAs layers is found and the RMG high-κ last processing is demonstrated to offer significant performance improvements over that of high-κ first.",

author = "N. Waldron and C. Merckling and W. Guo and P. Ong and L. Teugels and S. Ansar and D. Tsvetanova and F. Sebaai and \{Van Dorp\}, \{D. H.\} and A. Milenin and D. Lin and L. Nyns and J. Mitard and A. Pourghaderi and B. Douhard and O. Richard and H. Bender and G. Boccardi and M. Caymax and M. Heyns and W. Vandervorst and K. Barla and N. Collaert and Thean, \{A. V.Y.\}",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 34th Symposium on VLSI Technology, VLSIT 2014 ; Conference date: 09-06-2014 Through 12-06-2014",

year = "2014",

month = sep,

day = "8",

doi = "10.1109/VLSIT.2014.6894349",

language = "English",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "Digest of Technical Papers - Symposium on VLSI Technology",

address = "United States",

}

Waldron, N, Merckling, C, Guo, W, Ong, P, Teugels, L, Ansar, S, Tsvetanova, D, Sebaai, F, Van Dorp, DH, Milenin, A, Lin, D, Nyns, L, Mitard, J, Pourghaderi, A, Douhard, B, Richard, O, Bender, H, Boccardi, G, Caymax, M, Heyns, M, Vandervorst, W, Barla, K, Collaert, N & Thean, AVY 2014, An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates. in Digest of Technical Papers - Symposium on VLSI Technology., 6894349, Digest of Technical Papers - Symposium on VLSI Technology, Institute of Electrical and Electronics Engineers Inc., 34th Symposium on VLSI Technology, VLSIT 2014, Honolulu, United States, 9/06/14. https://doi.org/10.1109/VLSIT.2014.6894349

An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates. / Waldron, N.; Merckling, C.; Guo, W. et al.
Digest of Technical Papers - Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers Inc., 2014. 6894349 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review

TY - GEN

T1 - An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

AU - Waldron, N.

AU - Merckling, C.

AU - Guo, W.

AU - Ong, P.

AU - Teugels, L.

AU - Ansar, S.

AU - Tsvetanova, D.

AU - Sebaai, F.

AU - Van Dorp, D. H.

AU - Milenin, A.

AU - Lin, D.

AU - Nyns, L.

AU - Mitard, J.

AU - Pourghaderi, A.

AU - Douhard, B.

AU - Richard, O.

AU - Bender, H.

AU - Boccardi, G.

AU - Caymax, M.

AU - Heyns, M.

AU - Vandervorst, W.

AU - Barla, K.

AU - Collaert, N.

AU - Thean, A. V.Y.

PY - 2014/9/8

Y1 - 2014/9/8

N2 - InGaAs FinFETs fabricated by an unique Si fin replacement process have been demonstrated on 300mm Si substrates. The devices are integrated by process modules developed for a Si-IIIV hybrid 300mm R&D pilot line, compatible for future CMOS high-volume manufacturing. First devices with a SS of 190 mV/dec and extrinsic gm of 558 μS/μm are achieved for an EOT of 1.9nm, Lg of 50nm and fin width of 55nm. A trade-off between off state leakage and mobility for different p-type doping levels of the InP and InGaAs layers is found and the RMG high-κ last processing is demonstrated to offer significant performance improvements over that of high-κ first.

AB - InGaAs FinFETs fabricated by an unique Si fin replacement process have been demonstrated on 300mm Si substrates. The devices are integrated by process modules developed for a Si-IIIV hybrid 300mm R&D pilot line, compatible for future CMOS high-volume manufacturing. First devices with a SS of 190 mV/dec and extrinsic gm of 558 μS/μm are achieved for an EOT of 1.9nm, Lg of 50nm and fin width of 55nm. A trade-off between off state leakage and mobility for different p-type doping levels of the InP and InGaAs layers is found and the RMG high-κ last processing is demonstrated to offer significant performance improvements over that of high-κ first.

UR - https://www.scopus.com/pages/publications/84907680537

U2 - 10.1109/VLSIT.2014.6894349

DO - 10.1109/VLSIT.2014.6894349

M3 - Conference proceeding

AN - SCOPUS:84907680537

T3 - Digest of Technical Papers - Symposium on VLSI Technology

BT - Digest of Technical Papers - Symposium on VLSI Technology

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 34th Symposium on VLSI Technology, VLSIT 2014

Y2 - 9 June 2014 through 12 June 2014

ER -

Waldron N, Merckling C, Guo W, Ong P, Teugels L, Ansar S et al. An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates. In Digest of Technical Papers - Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers Inc. 2014. 6894349. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSIT.2014.6894349

An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

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