TY - GEN
T1 - Area-efficient processor for public-key cryptography in wireless sensor networks
AU - Murphy, Gerard D.
AU - Popovici, Emanuel M.
AU - Marnane, William P.
PY - 2008
Y1 - 2008
N2 - This paper presents a versatile public-key cryptographic processor suitable for wireless sensor networks which uses minimal hardware resources while maintaining high flexibility. The processor architecture is scalable and all hardware configurations support arbitrary bit-lengths and domain parameters. The tradeoffs between hardware area and timing for the public-key operations are demonstrated on the FPGA layer of the 25mm Tyndall mote.
AB - This paper presents a versatile public-key cryptographic processor suitable for wireless sensor networks which uses minimal hardware resources while maintaining high flexibility. The processor architecture is scalable and all hardware configurations support arbitrary bit-lengths and domain parameters. The tradeoffs between hardware area and timing for the public-key operations are demonstrated on the FPGA layer of the 25mm Tyndall mote.
UR - https://www.scopus.com/pages/publications/55849098909
U2 - 10.1109/SENSORCOMM.2008.38
DO - 10.1109/SENSORCOMM.2008.38
M3 - Conference proceeding
AN - SCOPUS:55849098909
SN - 9780769533308
T3 - Proceedings - 2nd Int. Conf. Sensor Technol. Appl., SENSORCOMM 2008, Includes: MESH 2008 Conf. Mesh Networks; ENOPT 2008 Energy Optim. Wireless Sensors Networks, UNWAT 2008 Under Water Sensors Systems
SP - 667
EP - 672
BT - Proceedings - 2nd Int. Conf. Sensor Technol. Appl., SENSORCOMM 2008, Includes
T2 - 2nd International Conference on Sensor Technologies and Applications, SENSORCOMM 2008
Y2 - 25 August 2008 through 31 August 2008
ER -