Arsenic Junction Thermal Stability and High-Dose Boron-Pocket Activation During SPER in nMOS Transistors

S. Severi; K. De Meyer; B. J. Pawlak; R. Duffy; E. Augendre; K. Henson; R. Lindsay

doi:10.1109/LED.2007.891255

Arsenic Junction Thermal Stability and High-Dose Boron-Pocket Activation During SPER in nMOS Transistors

S. Severi
, K. De Meyer
, B. J. Pawlak
, R. Duffy
, E. Augendre
, K. Henson
, R. Lindsay

Research output: Contribution to journal › Article › peer-review

Abstract

In this letter, thermal stability of arsenic (As) junctions formed by solid-phase epitaxial regrowth and their impact on device performance are investigated. If the temperature does not exceed 800 °C, a 35% junction sheet-resistance improvement over the conventional rapid thermal anneal is observed. The overlap junction resistance is not degraded and transistors, processed exclusively with lowly doped drain junctions, show a significant performance gain. High boron (B)-pocket dose leads to good transistor short-channel effect control, overcoming the B deactivation issue. The impact of B-pocket-related counterdoping and channel-mobility degradation on device characteristics are investigated. In the presence of heavily doped substrates, band-to-band tunneling is the dominant mechanism driving the reverse-bias junction leakage and is higher than the trap-assisted tunneling contribution related to the end-of-range defects.

Original language	English
Pages (from-to)	198-200
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	28
Issue number	3
DOIs	https://doi.org/10.1109/LED.2007.891255
Publication status	Published - 7 Mar 2007
Externally published	Yes

Keywords

Epitaxial growth
JFETs
MOS devices

Access to Document

10.1109/LED.2007.891255

Cite this

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title = "Arsenic Junction Thermal Stability and High-Dose Boron-Pocket Activation During SPER in nMOS Transistors",

abstract = "In this letter, thermal stability of arsenic (As) junctions formed by solid-phase epitaxial regrowth and their impact on device performance are investigated. If the temperature does not exceed 800 °C, a 35\% junction sheet-resistance improvement over the conventional rapid thermal anneal is observed. The overlap junction resistance is not degraded and transistors, processed exclusively with lowly doped drain junctions, show a significant performance gain. High boron (B)-pocket dose leads to good transistor short-channel effect control, overcoming the B deactivation issue. The impact of B-pocket-related counterdoping and channel-mobility degradation on device characteristics are investigated. In the presence of heavily doped substrates, band-to-band tunneling is the dominant mechanism driving the reverse-bias junction leakage and is higher than the trap-assisted tunneling contribution related to the end-of-range defects.",

keywords = "Epitaxial growth, JFETs, MOS devices",

author = "S. Severi and \{De Meyer\}, K. and Pawlak, \{B. J.\} and R. Duffy and E. Augendre and K. Henson and R. Lindsay",

year = "2007",

month = mar,

day = "7",

doi = "10.1109/LED.2007.891255",

language = "English",

volume = "28",

pages = "198--200",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "3",

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TY - JOUR

T1 - Arsenic Junction Thermal Stability and High-Dose Boron-Pocket Activation During SPER in nMOS Transistors

AU - Severi, S.

AU - De Meyer, K.

AU - Pawlak, B. J.

AU - Duffy, R.

AU - Augendre, E.

AU - Henson, K.

AU - Lindsay, R.

PY - 2007/3/7

Y1 - 2007/3/7

N2 - In this letter, thermal stability of arsenic (As) junctions formed by solid-phase epitaxial regrowth and their impact on device performance are investigated. If the temperature does not exceed 800 °C, a 35% junction sheet-resistance improvement over the conventional rapid thermal anneal is observed. The overlap junction resistance is not degraded and transistors, processed exclusively with lowly doped drain junctions, show a significant performance gain. High boron (B)-pocket dose leads to good transistor short-channel effect control, overcoming the B deactivation issue. The impact of B-pocket-related counterdoping and channel-mobility degradation on device characteristics are investigated. In the presence of heavily doped substrates, band-to-band tunneling is the dominant mechanism driving the reverse-bias junction leakage and is higher than the trap-assisted tunneling contribution related to the end-of-range defects.

AB - In this letter, thermal stability of arsenic (As) junctions formed by solid-phase epitaxial regrowth and their impact on device performance are investigated. If the temperature does not exceed 800 °C, a 35% junction sheet-resistance improvement over the conventional rapid thermal anneal is observed. The overlap junction resistance is not degraded and transistors, processed exclusively with lowly doped drain junctions, show a significant performance gain. High boron (B)-pocket dose leads to good transistor short-channel effect control, overcoming the B deactivation issue. The impact of B-pocket-related counterdoping and channel-mobility degradation on device characteristics are investigated. In the presence of heavily doped substrates, band-to-band tunneling is the dominant mechanism driving the reverse-bias junction leakage and is higher than the trap-assisted tunneling contribution related to the end-of-range defects.

KW - Epitaxial growth

KW - JFETs

KW - MOS devices

UR - https://www.scopus.com/pages/publications/85008049448

U2 - 10.1109/LED.2007.891255

DO - 10.1109/LED.2007.891255

M3 - Article

AN - SCOPUS:85008049448

SN - 0741-3106

VL - 28

SP - 198

EP - 200

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 3

ER -

Arsenic Junction Thermal Stability and High-Dose Boron-Pocket Activation During SPER in nMOS Transistors

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Keywords

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