Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide

Ran Yan; Russell Duane; Pedram Razavi; Aryan Afzalian; Isabelle Ferain; Chi Woo Lee; Nima Dehdashti; Bich Yen Nguyen; Konstantin K. Bourdelle; J. P. Colinge

doi:10.1109/VTSA.2010.5488939

Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide

Ran Yan
, Russell Duane
, Pedram Razavi
, Aryan Afzalian
, Isabelle Ferain
, Chi Woo Lee
, Nima Dehdashti
, Bich Yen Nguyen
, Konstantin K. Bourdelle
, J. P. Colinge

Tyndall IPES (Integrated Power)

Research output: Chapter in Book/Report/Conference proceedings › Chapter › peer-review

Abstract

In this paper, we analyze LDD depletion effects in Fully-Depleted SOI (FDSOI) devices with thin-BOX and ground plane (GP). Back-gate engineering is introduced to reduce the channel effects are rather insensitive to SOI layer thickness variations and remains well controlled for gate lengths down to 15nm.

Original language	English
Title of host publication	Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010
Pages	76-77
Number of pages	2
DOIs	https://doi.org/10.1109/VTSA.2010.5488939
Publication status	Published - 2010
Event	2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010 - Hsin Chu, Taiwan, Province of China Duration: 26 Apr 2010 → 28 Apr 2010

Publication series

Name	Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010

Conference

Conference	2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010
Country/Territory	Taiwan, Province of China
City	Hsin Chu
Period	26/04/10 → 28/04/10

Keywords

Back-gate engineering
Fully depleted silicon-on-insulation (FDSOI) MOSFET
LDD depletion effect
Thin buried-oxided (BOX)

Access to Document

10.1109/VTSA.2010.5488939

Cite this

Yan, R., Duane, R., Razavi, P., Afzalian, A., Ferain, I., Lee, C. W., Dehdashti, N., Nguyen, B. Y., Bourdelle, K. K., & Colinge, J. P. (2010). Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide. In Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010 (pp. 76-77). Article 5488939 (Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010). https://doi.org/10.1109/VTSA.2010.5488939

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title = "Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide",

abstract = "In this paper, we analyze LDD depletion effects in Fully-Depleted SOI (FDSOI) devices with thin-BOX and ground plane (GP). Back-gate engineering is introduced to reduce the channel effects are rather insensitive to SOI layer thickness variations and remains well controlled for gate lengths down to 15nm.",

keywords = "Back-gate engineering, Fully depleted silicon-on-insulation (FDSOI) MOSFET, LDD depletion effect, Thin buried-oxided (BOX)",

author = "Ran Yan and Russell Duane and Pedram Razavi and Aryan Afzalian and Isabelle Ferain and Lee, \{Chi Woo\} and Nima Dehdashti and Nguyen, \{Bich Yen\} and Bourdelle, \{Konstantin K.\} and Colinge, \{J. P.\}",

year = "2010",

doi = "10.1109/VTSA.2010.5488939",

language = "English",

isbn = "9781424450633",

series = "Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010",

pages = "76--77",

booktitle = "Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010",

note = "2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010 ; Conference date: 26-04-2010 Through 28-04-2010",

}

Yan, R, Duane, R, Razavi, P, Afzalian, A, Ferain, I, Lee, CW, Dehdashti, N, Nguyen, BY, Bourdelle, KK & Colinge, JP 2010, Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide. in Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010., 5488939, Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010, pp. 76-77, 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010, Hsin Chu, Taiwan, Province of China, 26/04/10. https://doi.org/10.1109/VTSA.2010.5488939

Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide. / Yan, Ran; Duane, Russell; Razavi, Pedram et al.
Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010. 2010. p. 76-77 5488939 (Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010).

Research output: Chapter in Book/Report/Conference proceedings › Chapter › peer-review

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T1 - Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide

AU - Yan, Ran

AU - Duane, Russell

AU - Razavi, Pedram

AU - Afzalian, Aryan

AU - Ferain, Isabelle

AU - Lee, Chi Woo

AU - Dehdashti, Nima

AU - Nguyen, Bich Yen

AU - Bourdelle, Konstantin K.

AU - Colinge, J. P.

PY - 2010

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AB - In this paper, we analyze LDD depletion effects in Fully-Depleted SOI (FDSOI) devices with thin-BOX and ground plane (GP). Back-gate engineering is introduced to reduce the channel effects are rather insensitive to SOI layer thickness variations and remains well controlled for gate lengths down to 15nm.

KW - Back-gate engineering

KW - Fully depleted silicon-on-insulation (FDSOI) MOSFET

KW - LDD depletion effect

KW - Thin buried-oxided (BOX)

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U2 - 10.1109/VTSA.2010.5488939

DO - 10.1109/VTSA.2010.5488939

M3 - Chapter

AN - SCOPUS:77957922387

SN - 9781424450633

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BT - Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010

T2 - 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010

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ER -

Yan R, Duane R, Razavi P, Afzalian A, Ferain I, Lee CW et al. Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide. In Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010. 2010. p. 76-77. 5488939. (Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010). doi: 10.1109/VTSA.2010.5488939

Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide

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