Abstract
We report a semiconductor device that exhibits a negative differential resistance characteristic. The device has the same structure as metal-oxide-semiconductor (MOS) transistors currently used in integrated circuits. Biasing the structure in the subthreshold regime and sweeping the bulk bias results in the negative differential resistance characteristic. The device exhibits a peak valley current ratio of approximately 52 at room temperature while drawing ten nanoampers of current which is of sufficiently low power for ultra-large scale integration (ULSI) applications.
| Original language | English |
|---|---|
| Pages (from-to) | 661-663 |
| Number of pages | 3 |
| Journal | IEEE Electron Device Letters |
| Volume | 24 |
| Issue number | 10 |
| DOIs | |
| Publication status | Published - Oct 2003 |
Keywords
- MOS devices
- Negative resistance devices