BTI reliability of advanced gate stacks for Beyond-Silicon devices: Challenges and opportunities
- G. Groeseneken
- , J. Franco
- , M. Cho
- , B. Kaczer
- , M. Toledano-Luque
- , Ph Roussel
- , T. Kauerauf
- , A. Alian
- , J. Mitard
- , H. Arimura
- , D. Lin
- , N. Waldron
- , S. Sioncke
- , L. Witters
- , H. Mertens
- , L. Ragnarsson
- , M. Heyns
- , N. Collaert
- , A. Thean
- , A. Steegen
- Interuniversitair Micro-Elektronica Centrum
- KU Leuven
Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review