Chip-on-board for large area die - an assessment of low stress glob-top materials

Typical applications of glob-top encapsulation are found in chip-on-board consumer products where chip sizes are small and reliability is non-critical. The extension of this encapsulation technique to MCM-Laminates (MCM-L) would bring clear benefits of low profile integrated circuits (IC) protection with the possibility of matching hermetic sealing performance. The technique of glob-top protection of ICs is well established, but is not proven for the higher performance and larger area ICs found in MCM systems. Reliability data for such assemblies is also needed to provide confidence in their use. This paper evaluates several new low stress materials suitable for glob-top encapsulation of large area ICs. Applications are in the area of processors and memory circuits where chips are greater than 10 mm on a side. The main concerns are the long term reliability of the devices and how the stress induced by the encapsulation material affects the chip and wire bonds. The use of dedicated test chips for this evaluation is described in this paper. Characterization tests including microsectioning, acoustic microscopy, as well as finite element modeling were employed in the assessment of encapsulation performance.