Comprehensive Design Procedure for Racetrack Microinductors

Jaime L. Lopez; Pablo Zumel; Seamus O'Driscoll; Zoran Pavlovic; Ruaidhri Murphy; Cian O'Mathuna; Cristina Fernandez

doi:10.1109/JESTPE.2021.3094631

Comprehensive Design Procedure for Racetrack Microinductors

Jaime L. Lopez
, Pablo Zumel
, Seamus O'Driscoll
, Zoran Pavlovic
, Ruaidhri Murphy
, Cian O'Mathuna
, Cristina Fernandez

Research output: Contribution to journal › Article › peer-review

Abstract

Present needs in efficiency and integration drive research toward the miniaturization of power converters. Among the latest components to achieve the desired degree of integration are cored micro-inductors that are still one of the hardest devices to optimize, due to the high number of freedom degrees in their fabrication. In this article, a comprehensive design procedure for these micro-inductors is presented. The proposed method makes it possible to design the optimal device in a single iteration. It also allows the designer to easily ascertain the limits of the inductor in terms of handled current and losses and provides valuable physical insights into the output of the process.

Original language	English
Pages (from-to)	6912-6923
Number of pages	12
Journal	IEEE Journal of Emerging and Selected Topics in Power Electronics
Volume	9
Issue number	6
DOIs	https://doi.org/10.1109/JESTPE.2021.3094631
Publication status	Published - 1 Dec 2021

Keywords

Inductor-on-silicon
integrated power
magnetics-on-silicon
micro-inductor
planar back-end-of-line (BEOL)
power-supply-on-chip (PwrSoC)
race-track
thin-film

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10.1109/JESTPE.2021.3094631

Cite this

@article{6c59e15e5a2f451d993f0a3f402b9354,

title = "Comprehensive Design Procedure for Racetrack Microinductors",

abstract = "Present needs in efficiency and integration drive research toward the miniaturization of power converters. Among the latest components to achieve the desired degree of integration are cored micro-inductors that are still one of the hardest devices to optimize, due to the high number of freedom degrees in their fabrication. In this article, a comprehensive design procedure for these micro-inductors is presented. The proposed method makes it possible to design the optimal device in a single iteration. It also allows the designer to easily ascertain the limits of the inductor in terms of handled current and losses and provides valuable physical insights into the output of the process.",

keywords = "Inductor-on-silicon, integrated power, magnetics-on-silicon, micro-inductor, planar back-end-of-line (BEOL), power-supply-on-chip (PwrSoC), race-track, thin-film",

author = "Lopez, \{Jaime L.\} and Pablo Zumel and Seamus O'Driscoll and Zoran Pavlovic and Ruaidhri Murphy and Cian O'Mathuna and Cristina Fernandez",

note = "Publisher Copyright: {\textcopyright} 2013 IEEE.",

year = "2021",

month = dec,

day = "1",

doi = "10.1109/JESTPE.2021.3094631",

language = "English",

volume = "9",

pages = "6912--6923",

journal = "IEEE Journal of Emerging and Selected Topics in Power Electronics",

issn = "2168-6777",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "6",

}

TY - JOUR

T1 - Comprehensive Design Procedure for Racetrack Microinductors

AU - Lopez, Jaime L.

AU - Zumel, Pablo

AU - O'Driscoll, Seamus

AU - Pavlovic, Zoran

AU - Murphy, Ruaidhri

AU - O'Mathuna, Cian

AU - Fernandez, Cristina

PY - 2021/12/1

Y1 - 2021/12/1

N2 - Present needs in efficiency and integration drive research toward the miniaturization of power converters. Among the latest components to achieve the desired degree of integration are cored micro-inductors that are still one of the hardest devices to optimize, due to the high number of freedom degrees in their fabrication. In this article, a comprehensive design procedure for these micro-inductors is presented. The proposed method makes it possible to design the optimal device in a single iteration. It also allows the designer to easily ascertain the limits of the inductor in terms of handled current and losses and provides valuable physical insights into the output of the process.

AB - Present needs in efficiency and integration drive research toward the miniaturization of power converters. Among the latest components to achieve the desired degree of integration are cored micro-inductors that are still one of the hardest devices to optimize, due to the high number of freedom degrees in their fabrication. In this article, a comprehensive design procedure for these micro-inductors is presented. The proposed method makes it possible to design the optimal device in a single iteration. It also allows the designer to easily ascertain the limits of the inductor in terms of handled current and losses and provides valuable physical insights into the output of the process.

KW - Inductor-on-silicon

KW - integrated power

KW - magnetics-on-silicon

KW - micro-inductor

KW - planar back-end-of-line (BEOL)

KW - power-supply-on-chip (PwrSoC)

KW - race-track

KW - thin-film

UR - https://www.scopus.com/pages/publications/85112590715

U2 - 10.1109/JESTPE.2021.3094631

DO - 10.1109/JESTPE.2021.3094631

M3 - Article

AN - SCOPUS:85112590715

SN - 2168-6777

VL - 9

SP - 6912

EP - 6923

JO - IEEE Journal of Emerging and Selected Topics in Power Electronics

JF - IEEE Journal of Emerging and Selected Topics in Power Electronics

IS - 6

ER -

Comprehensive Design Procedure for Racetrack Microinductors

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Keywords

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