Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole

  • J. Franco
  • , A. Vais
  • , S. Sioncke
  • , V. Putcha
  • , B. Kaczer
  • , B. S. Shie
  • , X. Shi
  • , R. Mahlouji
  • , L. Nyns
  • , D. Zhou
  • , N. Waldron
  • , J. W. Maes
  • , Q. Xie
  • , M. Givens
  • , F. Tang
  • , X. Jiang
  • , H. Arimura
  • , T. Schram
  • , L. A. Ragnarsson
  • , A. Sibaja Hernandez
    • G. Hellings, N. Horiguchi, M. Heyns, G. Groeseneken, D. Linten, N. Collaert, A. Thean

Research output: Chapter in Book/Report/Conference proceedings › Chapter › peer-review

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