TY - JOUR
T1 - Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications
AU - Gammon, P. M.
AU - Chan, C. W.
AU - Gity, F.
AU - Trajkovic, T.
AU - Kilchytska, V.
AU - Fan, L.
AU - Pathirana, V.
AU - Camuso, G.
AU - Ben Ali, K.
AU - Flandre, D.
AU - Mawby, P. A.
AU - Gardner, J. W.
N1 - Publisher Copyright:
© The Authors, published by EDP Sciences, 2017.
PY - 2017/5/23
Y1 - 2017/5/23
N2 - A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si) wafer bonded to silicon carbide (SiC). This novel silicon-on-silicon-carbide (Si/SiC) substrate solution promises to combine the benefits of silicon-on-insulator (SOI) technology (i.e device confinement, radiation tolerance, high and low temperature performance) with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance). Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.
AB - A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si) wafer bonded to silicon carbide (SiC). This novel silicon-on-silicon-carbide (Si/SiC) substrate solution promises to combine the benefits of silicon-on-insulator (SOI) technology (i.e device confinement, radiation tolerance, high and low temperature performance) with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance). Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.
UR - https://www.scopus.com/pages/publications/85020207911
U2 - 10.1051/e3sconf/20171612003
DO - 10.1051/e3sconf/20171612003
M3 - Article
AN - SCOPUS:85020207911
SN - 2267-1242
VL - 16
JO - E3S Web of Conferences
JF - E3S Web of Conferences
M1 - 12003
T2 - 11th European Space Power Conference, ESPC 2016
Y2 - 3 October 2016 through 7 October 2016
ER -