Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications

  • P. M. Gammon
  • , C. W. Chan
  • , F. Gity
  • , T. Trajkovic
  • , V. Kilchytska
  • , L. Fan
  • , V. Pathirana
  • , G. Camuso
  • , K. Ben Ali
  • , D. Flandre
  • , P. A. Mawby
  • , J. W. Gardner

Research output: Contribution to journalArticlepeer-review

Abstract

A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si) wafer bonded to silicon carbide (SiC). This novel silicon-on-silicon-carbide (Si/SiC) substrate solution promises to combine the benefits of silicon-on-insulator (SOI) technology (i.e device confinement, radiation tolerance, high and low temperature performance) with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance). Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.

Original languageEnglish
Article number12003
JournalE3S Web of Conferences
Volume16
DOIs
Publication statusPublished - 23 May 2017
Event11th European Space Power Conference, ESPC 2016 - Thessaloniki, Greece
Duration: 3 Oct 20167 Oct 2016

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