TY - GEN
T1 - Design and Implementation of 12-bit Vedic Multiplier using Optimized Decoder-based Adder
AU - Kumari, Arti
AU - Kharwar, Saurabh
AU - Kumar, Anjan
AU - Singh, Sangeeta
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - A Multiplier is one of the arithmetic circuits which plays a major role in many computational systems-based real-time applications. The responsibility of power consumption in the system greatly depends on the power consumption of its multiplier. In this work, slice LUT's, slices, IOB, delay, and power of the proposed 3x3 bit, 6x6 bit, and 12x12 bit novel decoder based Vedic multiplier using 'Urdhva Tiryakbhayam' sutra are calculated and compared with the conventional multiplier. The simulation and synthesis of the proposed 3x3 bit, 6x6 bit, and 12x12 bit multiplier are performed using Artex-7 on Xilinx Vivado. The comparative study of the proposed Vedic multiplier with the existing Vedic multiplier exhibits a significant improvement in terms of resource utilization.
AB - A Multiplier is one of the arithmetic circuits which plays a major role in many computational systems-based real-time applications. The responsibility of power consumption in the system greatly depends on the power consumption of its multiplier. In this work, slice LUT's, slices, IOB, delay, and power of the proposed 3x3 bit, 6x6 bit, and 12x12 bit novel decoder based Vedic multiplier using 'Urdhva Tiryakbhayam' sutra are calculated and compared with the conventional multiplier. The simulation and synthesis of the proposed 3x3 bit, 6x6 bit, and 12x12 bit multiplier are performed using Artex-7 on Xilinx Vivado. The comparative study of the proposed Vedic multiplier with the existing Vedic multiplier exhibits a significant improvement in terms of resource utilization.
KW - Decoder-based Vedic multiplier
KW - Full adders
KW - Urdhva Tiryakbhayam Sutra
KW - Vedic multiplier
UR - https://www.scopus.com/pages/publications/85136285189
U2 - 10.1109/SASM51857.2021.9841142
DO - 10.1109/SASM51857.2021.9841142
M3 - Conference proceeding
AN - SCOPUS:85136285189
T3 - 2021 International Conference on Simulation, Automation and Smart Manufacturing, SASM 2021
BT - 2021 International Conference on Simulation, Automation and Smart Manufacturing, SASM 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2021 International Conference on Simulation, Automation and Smart Manufacturing, SASM 2021
Y2 - 20 August 2021 through 21 August 2021
ER -