Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits

M. A. Jezzini; P. J. Marraccini; F. H. Peters

doi:10.1117/12.2227628

Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits

M. A. Jezzini
, P. J. Marraccini
, F. H. Peters

University College Cork

Research output: Chapter in Book/Report/Conference proceedings › Chapter › peer-review

Abstract

The packaging of high speed Photonic Integrated Circuits (PICs) should maintain the electrical signal integrity. The standard packaging of high speed PICs relies on wire bonds. This is not desirable because wire bonds degrade the quality of the electrical signal. The research presented in this paper proposes to replace wire bonds with an interposer with multilevel transmission lines. By attaching the PIC by flip chip onto the interposer, the use of wire bonds is avoided. The main concern for designing an interposer with multilevel transmission lines is the vertical transition, which must be designed to avoid return and radiation losses. In this paper, a novel design of a high speed vertical transition for Low Temperature Co-fired Ceramic (LTCC) is presented. The proposed vertical transition is simpler than others recently published in the literature, due to eliminating the need for additional ceramic layers or air cavities. A LTCC board was fabricated with several variations of the presented transition to find the optimal dimensions of the structure. The structures were fabricated then characterized and have a 3 dB bandwidth of 37 GHz and an open eye diagram at 44 Gbps. A full wave electromagnetic simulation is described and compared with good agreement to the measurements. The results suggest that an LTCC board with this design can be used for 40 Gbps per channel applications. Keywords: Photonics packaging, Low Temperature Co-Fired Ceramics.

Original language	English
Title of host publication	Silicon Photonics and Photonic Integrated Circuits V
Editors	Lorenzo Pavesi, Laurent Vivien, Stefano Pelli
Publisher	SPIE
ISBN (Electronic)	9781510601369
DOIs	https://doi.org/10.1117/12.2227628
Publication status	Published - 2016
Event	Silicon Photonics and Photonic Integrated Circuits V - Brussels, Belgium Duration: 3 Apr 2016 → 7 Apr 2016

Publication series

Name	Proceedings of SPIE - The International Society for Optical Engineering
Volume	9891
ISSN (Print)	0277-786X
ISSN (Electronic)	1996-756X

Conference

Conference	Silicon Photonics and Photonic Integrated Circuits V
Country/Territory	Belgium
City	Brussels
Period	3/04/16 → 7/04/16

Keywords

Low Temperature Co-fired Ceramics
Microwave design
Microwave vertical transition
Photonics packaging
System on a Package (SoP)

Access to Document

10.1117/12.2227628

Cite this

Jezzini, M. A., Marraccini, P. J., & Peters, F. H. (2016). Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits. In L. Pavesi, L. Vivien, & S. Pelli (Eds.), Silicon Photonics and Photonic Integrated Circuits V Article 98911R (Proceedings of SPIE - The International Society for Optical Engineering; Vol. 9891). SPIE. https://doi.org/10.1117/12.2227628

Jezzini, M. A. ; Marraccini, P. J. ; Peters, F. H. / Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits. Silicon Photonics and Photonic Integrated Circuits V. editor / Lorenzo Pavesi ; Laurent Vivien ; Stefano Pelli. SPIE, 2016. (Proceedings of SPIE - The International Society for Optical Engineering).

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title = "Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits",

abstract = "The packaging of high speed Photonic Integrated Circuits (PICs) should maintain the electrical signal integrity. The standard packaging of high speed PICs relies on wire bonds. This is not desirable because wire bonds degrade the quality of the electrical signal. The research presented in this paper proposes to replace wire bonds with an interposer with multilevel transmission lines. By attaching the PIC by flip chip onto the interposer, the use of wire bonds is avoided. The main concern for designing an interposer with multilevel transmission lines is the vertical transition, which must be designed to avoid return and radiation losses. In this paper, a novel design of a high speed vertical transition for Low Temperature Co-fired Ceramic (LTCC) is presented. The proposed vertical transition is simpler than others recently published in the literature, due to eliminating the need for additional ceramic layers or air cavities. A LTCC board was fabricated with several variations of the presented transition to find the optimal dimensions of the structure. The structures were fabricated then characterized and have a 3 dB bandwidth of 37 GHz and an open eye diagram at 44 Gbps. A full wave electromagnetic simulation is described and compared with good agreement to the measurements. The results suggest that an LTCC board with this design can be used for 40 Gbps per channel applications. Keywords: Photonics packaging, Low Temperature Co-Fired Ceramics.",

keywords = "Low Temperature Co-fired Ceramics, Microwave design, Microwave vertical transition, Photonics packaging, System on a Package (SoP)",

author = "Jezzini, \{M. A.\} and Marraccini, \{P. J.\} and Peters, \{F. H.\}",

note = "Publisher Copyright: {\textcopyright} 2016 SPIE.; Silicon Photonics and Photonic Integrated Circuits V ; Conference date: 03-04-2016 Through 07-04-2016",

year = "2016",

doi = "10.1117/12.2227628",

language = "English",

series = "Proceedings of SPIE - The International Society for Optical Engineering",

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Jezzini, MA, Marraccini, PJ & Peters, FH 2016, Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits. in L Pavesi, L Vivien & S Pelli (eds), Silicon Photonics and Photonic Integrated Circuits V., 98911R, Proceedings of SPIE - The International Society for Optical Engineering, vol. 9891, SPIE, Silicon Photonics and Photonic Integrated Circuits V, Brussels, Belgium, 3/04/16. https://doi.org/10.1117/12.2227628

Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits. / Jezzini, M. A.; Marraccini, P. J.; Peters, F. H.
Silicon Photonics and Photonic Integrated Circuits V. ed. / Lorenzo Pavesi; Laurent Vivien; Stefano Pelli. SPIE, 2016. 98911R (Proceedings of SPIE - The International Society for Optical Engineering; Vol. 9891).

Research output: Chapter in Book/Report/Conference proceedings › Chapter › peer-review

TY - CHAP

T1 - Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits

AU - Jezzini, M. A.

AU - Marraccini, P. J.

AU - Peters, F. H.

PY - 2016

Y1 - 2016

N2 - The packaging of high speed Photonic Integrated Circuits (PICs) should maintain the electrical signal integrity. The standard packaging of high speed PICs relies on wire bonds. This is not desirable because wire bonds degrade the quality of the electrical signal. The research presented in this paper proposes to replace wire bonds with an interposer with multilevel transmission lines. By attaching the PIC by flip chip onto the interposer, the use of wire bonds is avoided. The main concern for designing an interposer with multilevel transmission lines is the vertical transition, which must be designed to avoid return and radiation losses. In this paper, a novel design of a high speed vertical transition for Low Temperature Co-fired Ceramic (LTCC) is presented. The proposed vertical transition is simpler than others recently published in the literature, due to eliminating the need for additional ceramic layers or air cavities. A LTCC board was fabricated with several variations of the presented transition to find the optimal dimensions of the structure. The structures were fabricated then characterized and have a 3 dB bandwidth of 37 GHz and an open eye diagram at 44 Gbps. A full wave electromagnetic simulation is described and compared with good agreement to the measurements. The results suggest that an LTCC board with this design can be used for 40 Gbps per channel applications. Keywords: Photonics packaging, Low Temperature Co-Fired Ceramics.

AB - The packaging of high speed Photonic Integrated Circuits (PICs) should maintain the electrical signal integrity. The standard packaging of high speed PICs relies on wire bonds. This is not desirable because wire bonds degrade the quality of the electrical signal. The research presented in this paper proposes to replace wire bonds with an interposer with multilevel transmission lines. By attaching the PIC by flip chip onto the interposer, the use of wire bonds is avoided. The main concern for designing an interposer with multilevel transmission lines is the vertical transition, which must be designed to avoid return and radiation losses. In this paper, a novel design of a high speed vertical transition for Low Temperature Co-fired Ceramic (LTCC) is presented. The proposed vertical transition is simpler than others recently published in the literature, due to eliminating the need for additional ceramic layers or air cavities. A LTCC board was fabricated with several variations of the presented transition to find the optimal dimensions of the structure. The structures were fabricated then characterized and have a 3 dB bandwidth of 37 GHz and an open eye diagram at 44 Gbps. A full wave electromagnetic simulation is described and compared with good agreement to the measurements. The results suggest that an LTCC board with this design can be used for 40 Gbps per channel applications. Keywords: Photonics packaging, Low Temperature Co-Fired Ceramics.

KW - Low Temperature Co-fired Ceramics

KW - Microwave design

KW - Microwave vertical transition

KW - Photonics packaging

KW - System on a Package (SoP)

UR - https://www.scopus.com/pages/publications/84982273857

U2 - 10.1117/12.2227628

DO - 10.1117/12.2227628

M3 - Chapter

AN - SCOPUS:84982273857

T3 - Proceedings of SPIE - The International Society for Optical Engineering

BT - Silicon Photonics and Photonic Integrated Circuits V

A2 - Pavesi, Lorenzo

A2 - Vivien, Laurent

A2 - Pelli, Stefano

PB - SPIE

T2 - Silicon Photonics and Photonic Integrated Circuits V

Y2 - 3 April 2016 through 7 April 2016

ER -

Jezzini MA, Marraccini PJ, Peters FH. Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits. In Pavesi L, Vivien L, Pelli S, editors, Silicon Photonics and Photonic Integrated Circuits V. SPIE. 2016. 98911R. (Proceedings of SPIE - The International Society for Optical Engineering). doi: 10.1117/12.2227628

Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits

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