@inbook{73689eb58fbe48ffa82debfffcf23c5e,
title = "Design of a Miller Amplifier using gm/IDbased on A First-order Building Block Approximation",
abstract = "In this paper the gm/ID methodology for designing analog CMOS circuits is used. As a case of study the single-ended Miller OTA design is widely discussed and analized. In order to show the advantage of gm/ID it is demonstrated that the first order building block approximation allows to understand not only how to correctly do the sizing of each transistor, but also the physical meaning of each small-signal design model. This design flow is carried out by using design rules of a 130 nm CMOS technology, where Cadence is used for performing simulations at transistor level, obtaining results that confirm the usefullnes of the design models and the basics' veracity.",
keywords = "Amplifiers, CMOS analog integrated circuits, Firstorder system, g/Imethodology, OTA Miller",
author = "Palma, \{Victor Hugo Arzate\} and Federico Sandoval-Ibarra",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 13th International Symposium on Advanced Topics in Electrical Engineering, ATEE 2023 ; Conference date: 23-03-2023 Through 25-03-2023",
year = "2023",
doi = "10.1109/ATEE58038.2023.10108237",
language = "English",
series = "13th International Symposium on Advanced Topics in Electrical Engineering, ATEE 2023",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "13th International Symposium on Advanced Topics in Electrical Engineering, ATEE 2023",
address = "United States",
}