Development and Analysis of an Automated Test System for the Thermal Characterization of IC Packaging Technologies

This paper will report on the development of an automated test system for the thermal characterization of IC packages. A range of thermal test chips which have also been developed will be described. The thermal test system is discussed in detail in terms of the temperature sensor calibration algorithm and the error budget associated with junction-to-case thermal resistance measurements in an oven environment. A detailed discussion of the experimental errors and uncertainties is presented. A figure of ±4% has been obtained for both the accuracy and repeatability of an oven-based junction-to-case thermal resistance test method. This is shown to compare favorably with the performance of a temperature controlled heat sink system. By comparison with infra-red thermal imaging, the measurement of the average chip junction temperature is shown to provide an accurate thermal resistance figure for conventional IC package structures. IC packages used to demonstrate the application of the test system and test chips to thermal characterization include DIP's, PGA's, and chip carriers.