Development and application of test chips and test systems for the thermal characteristics of IC packaging technologies

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Abstract

The authors report on the development and application of test chips and computerized test systems for the steady state and transient thermal characterization of IC packaging technologies. The steady state test system is discussed in terms of the temperature sensor calibration algorithm and the error budget associated with junction-to-case thermal resistance measurements in an oven environment. Accuracy and repeatability figures of ±18% and ±4% respectively have been obtained for an oven-based junction-to-case thermal resistance test method. By a comparison with infrared thermal imaging, the use of the average junction temperature is shown to provide an accurate thermal resistance figure for conventional IC package structures. Examples are presented of the application of the test chips and test systems to the analysis of the IC packaging technologies.

Original languageEnglish
Title of host publicationProceedings - IEEE Semiconductor Thermal and Temperature Measurement Symposium
PublisherPubl by IEEE
Pages47-54
Number of pages8
ISBN (Print)0780305000
Publication statusPublished - Feb 1992
EventProceedings of the 8th Annual IEEE Semiconductor Thermal Measurement and Management Symposium - Austin, TX, USA
Duration: 3 Feb 19925 Feb 1992

Publication series

NameProceedings - IEEE Semiconductor Thermal and Temperature Measurement Symposium

Conference

ConferenceProceedings of the 8th Annual IEEE Semiconductor Thermal Measurement and Management Symposium
CityAustin, TX, USA
Period3/02/925/02/92

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