TY - GEN
T1 - Device characteristics of Trigate-FET with barrier constrictions in the channel
AU - Dehdashti, Nima
AU - Afzalian, A.
AU - Lee, C. W.
AU - Yan, R.
AU - Fagas, G.
AU - Colinge, J. P.
PY - 2009
Y1 - 2009
N2 - We have investigated the effect of symmetric geometrical constrictions on the device characteristics of ultrathin silicon-on-insulator (SOI) nanowire with Trigate structure by means of the full real-space three dimensional Nonequilibrium Greens's Function (NEGF) method. In this study, geometrical constrictions are introduced as energy barriers near the source and the drain junctions and their strength is modulated by the potential height and the geometry. Interestingly, even at room temperature the drain current in the device shows oscillations as a function of the applied gate voltage. This can be traced to the development of transmission resonances as the channel is additionally confined along the current direction.
AB - We have investigated the effect of symmetric geometrical constrictions on the device characteristics of ultrathin silicon-on-insulator (SOI) nanowire with Trigate structure by means of the full real-space three dimensional Nonequilibrium Greens's Function (NEGF) method. In this study, geometrical constrictions are introduced as energy barriers near the source and the drain junctions and their strength is modulated by the potential height and the geometry. Interestingly, even at room temperature the drain current in the device shows oscillations as a function of the applied gate voltage. This can be traced to the development of transmission resonances as the channel is additionally confined along the current direction.
UR - https://www.scopus.com/pages/publications/70350212719
U2 - 10.1109/IWCE.2009.5091103
DO - 10.1109/IWCE.2009.5091103
M3 - Conference proceeding
AN - SCOPUS:70350212719
SN - 9781424439270
T3 - Proceedings - 2009 13th International Workshop on Computational Electronics, IWCE 2009
BT - Proceedings - 2009 13th International Workshop on Computational Electronics, IWCE 2009
T2 - 2009 13th International Workshop on Computational Electronics, IWCE 2009
Y2 - 27 May 2009 through 29 May 2009
ER -