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Double-gate Si junction-less n-type transistor for high performance Cu-BEOL compatible applications using 3D sequential integration

  • A. Vandooren
  • , L. Witters
  • , E. Vecchio
  • , E. Kunnen
  • , G. Hellings
  • , L. Peng
  • , F. Inoue
  • , W. Li
  • , N. Waldron
  • , D. Mocuta
  • , N. Collaert
  • Interuniversitair Micro-Elektronica Centrum

Research output: Chapter in Book/Report/Conference proceedings › Conference proceeding › peer-review

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