Energy Efficient LSTM Accelerator with e-FPGAs for XAI Based Text Classification

The present era has witnessed the increasing use of reconfigurable hardware or field programmable gate arrays (FPGAs) as hardware accelerators for intelligent applications. Existing explainable artificial intelligence (XAI) based applications are associated with low latency, high-power consumption and hence, are not energy efficient in nature. In this article, we consider an XAI based text classifier that utilizes LSTM model. Initially, we discuss the evolution of AI from symbolic approaches to deep learning, emphasizing the importance of addressing the computational demands and energy efficiency of deep learning models like LSTMs. We propose the use of embedded FPGAs or e-FPGAs as hardware accelerators in the system design. For an XAI based text classifier that uses LSTM, we find out the various functional units and order them as per their power consumption. Then, we try to map them to available e-FPGAs, which are partitioned into various virtual portions that houses the different power and time-consuming functional units. We analyze how the throughput and power consumption of the system varies with increasing e-FPGA resources. As obtained from experimental results, throughput increases, while power consumption decreases when the various functional units are mapped to the e-FPGA resources, thus, enhancing the energy efficiency of the system.