Evaluation of hot-carrier degradation of n-channel MOSFETs at low gate bias

Hot-carrier effects pose a significant reliability issue as device dimensions are scaled down [1]. The ability to accurately predict hot-carrier lifetimes for devices is important for the development of fine-geometry MOS technology [2]. The hot-carrier degradation model developed by Hu et al. [1] at the University of Berkeley is widely used to predict device lifetimes under normal operating conditions from the results of accelerated tests. This model predicts device lifetimes at all bias conditions, while older models predict only worst case lifetimes at given drain voltages [3]. The Berkeley model is thus applicable to circuit-level reliability simulations. However, this paper shows that the model exaggerates the dependence of lifetime on gate bias, leading to very pessimistic minimum lifetime predictions. Since hot-carrier reliability is a crucial factor in modern MOS technologies, this error in the model may lead to mistaken conclusions on product viability.