Abstract
Ge1-xSnx alloys form a heterogeneous material system with high potential for applications in both optoelectronic and high-speed electronics devices. The attractiveness of Ge1-xSnx lies in the ability to tune the semiconductor band gap and electronic properties as a function of Sn concentration. Advances in Ge1-xSnx material synthesis have raised expectations recently, but there are considerable problems in terms of device demonstration. Although Ge1-xSnx thin films have been previously explored experimentally, in-depth studies of the electrical properties of Ge1-xSnx nanostructures are very limited, specifically those on nanowires grown via a bottom-up vapor-liquid-solid (VLS) process using metal catalysts. In this study, a detailed electrical investigation is presented of nominally undoped Ge1-xSnx bottom-up-grown nanowire devices with different Sn percentages (3-9 at. %). The entire device fabrication process is performed at relatively low temperatures, the maximum temperature being 440 °C. Device current modulation is performed through backgating from a substrate electrode, achieving impressive on-off current (ION/IOFF) ratios of up to 104, showing their potential for electronic and sensor-based applications. Contact resistance (RC) extraction is essential for proper VLS-grown nanowire device electrical evaluation. Once the RC contribution is extracted and removed, parameter values such as mobility can change significantly, by up to 70% in this work. When benchmarked against other Ge1-xSnx electronic devices, the VLS-grown nanowire devices have potential in applications where a high ION/IOFF ratio is important and where thermal budget and processing temperatures are required to be kept to minimum.
| Original language | English |
|---|---|
| Pages (from-to) | 1226-1234 |
| Number of pages | 9 |
| Journal | ACS Applied Electronic Materials |
| Volume | 2 |
| Issue number | 5 |
| DOIs | |
| Publication status | Published - 26 May 2020 |
Keywords
- carrier mobility
- contact resistance
- GeSn nanowires
- low-temperature processing
- MOSFETs
- sub-threshold slope
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