Abstract
This paper proposes a systematic method to link technical power packaging issues to user requirements as the basis for developing a Power Electronics Technology Roadmap. The framework goes further in proposing a framework for designers to better understand, evaluate and communicate the technical needs for integration of electro-physical power electronic circuits. This paper presents the framework as a three-dimensional coordinate of User Requirements, Levels of Packaging, and Technical Issues, cross-cut by Forms of Energy. Examples assist the reader in understanding the framework and appreciating the potential for application of the framework in the future developments of power electronics packaging.
| Original language | English |
|---|---|
| Pages (from-to) | 156-161 |
| Number of pages | 6 |
| Journal | Proceedings of SPIE - The International Society for Optical Engineering |
| Volume | 3582 |
| Publication status | Published - 1998 |
| Externally published | Yes |
| Event | Proceedings of the 1998 International Symposium on Microelectronics - San Diego, CA, USA Duration: 1 Nov 1998 → 4 Nov 1998 |