Abstract
As the integration of electro-physical circuits increases, many physical components and topologies are either directly or indirectly determined by the electrical designer. This paper presents a packaging technology framework for designers to better understand, evaluate and communicate the technical needs for a `physical circuit'. The framework goes further in proposing a systematic method to link technical power packaging issues to user requirements as the basis for developing a Power Electronics Technology Roadmap. This paper presents the framework as a three-dimensional coordinate of User Requirements, Levels of Packaging, and Interfaces and Pathways, cross-cut by a fourth dimension of Energy Forms. Examples assist the reader in understanding the framework and appreciating the potential for application of the framework in the future developments of power electronics packaging.
| Original language | English |
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| Pages | 9-15 |
| Number of pages | 7 |
| Publication status | Published - 1998 |
| Externally published | Yes |
| Event | Proceedings of the 1998 13th Annual Applied Power Electronics Conference and Exposition, APEC'98. Part 1 (of 2) - Anaheim, CA, USA Duration: 15 Feb 1998 → 19 Feb 1998 |
Conference
| Conference | Proceedings of the 1998 13th Annual Applied Power Electronics Conference and Exposition, APEC'98. Part 1 (of 2) |
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| City | Anaheim, CA, USA |
| Period | 15/02/98 → 19/02/98 |