Gate current: Modeling, ΔL extraction and impact on RF performance

  • R. Van Langevelde
  • , A. J. Scholten
  • , R. Duffy
  • , F. N. Cubaynes
  • , M. J. Knitel
  • , D. B.M. Klaassen

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper a new physical gate leakage model is introduced, which is both accurate and simple. It only uses 5 parameters, making parameter extraction straightforward. As a result the model can be used to extract effective length for modern CMOS technologies. The influence of gate current on the RF performance is studied.

Original languageEnglish
Pages (from-to)289-292
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 2001
Externally publishedYes
EventIEEE International Electron Devices Meeting IEDM 2001 - Washington, DC, United States
Duration: 2 Dec 20015 Dec 2001

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