@inproceedings{46d3346dae4946b29305aaae64738fa0,
title = "Heterogeneous integration and fabrication of III-V MOS devices in a 200mm processing environment",
abstract = "We report on the fabrication of MOS capacitors on 200 mm virtual GaAs substrates using a Si CMOS processing environment. The fabricated capacitors were comparable to those processed on bulk GaAs material. Topside contact was made to the GaAs using a novel CMOS compatible self-aligned NiGe contact scheme resulting in a measured contact resistance of 0.26 Ω.cm. Cross-contamination from various III-V substrates was investigated and it was found that by limiting the thermal budget to ≤ 300°C cross-contamination from the outgassing of In, Ga and As could be eliminated. For wet processing the judicious choice of recipe and processing conditions resulted in no significant cross-contamination being detected as determined by TXRF monitoring. This achievement enables III-V device production using state-of-the-art Si processing equipment.",
author = "Niamh Waldron and Nguyen, \{Ngoc Duy\} and Dennis Lin and Guy Brammertz and Benjamin Vincent and Andrea Firrincieli and Gillis Winderick and Sonja Sioncke and \{De Jaeger\}, Brice and Gang Wang and Jerome Mitard and Wang, \{Wei E.\} and Marc Heyns and Matty Caymax and Marc Meuris and Philippe Absil and Hoffman, \{Thomas Y.\}",
year = "2011",
doi = "10.1149/1.3569922",
language = "English",
isbn = "9781566778640",
series = "ECS Transactions",
number = "3",
pages = "299--309",
booktitle = "Dielectrics in Nanosystems -and- Graphene, Ge/III-V, Nanowires and Emerging Materials for Post-CMOS Applications 3",
edition = "3",
note = "Graphene Ge/III-V, Nanowires and Emerging Materials for Post-CMOS Applications - 3 - 219th ECS Meeting ; Conference date: 02-05-2011 Through 04-05-2011",
}