Abstract
The monolithic hetero-integration of III/V materials on Si substrates could enable a multitude of new device applications and functionalities which would benefit from both the excellent optoelectronic properties of III/V compound materials and the well-established and highly mature Si manufacturing technologies. Due to the lattice mismatch between most III/V compound semiconductors and Si substrates, monolithic growth inevitably leads to the formation of strain releasing defects which degrade the final device performance and reliability. This review paper provides an overview of current approaches and methods to control the defect formation in monolithic III/V hetero-epitaxy on (001) Si substrates. The focus is on understanding the mechanisms of defect nucleation, manipulation and confinement in order to eventually realize active III/V device layers on Si substrates with high crystalline quality. For details about device applications numerous references are listed. Although many different integration approaches are discussed in the literature, there are two main concepts for the hetero-epitaxial growth of III/V material on Si: growth on blanket Si wafers and selective area growth on patterned Si substrates. Both methods have their advantages and disadvantages with respect to defect control and could potentially enable the integration of different III/V devices on a Si platform.
| Original language | English |
|---|---|
| Article number | 093002 |
| Journal | Semiconductor Science and Technology |
| Volume | 33 |
| Issue number | 9 |
| DOIs | |
| Publication status | Published - 17 Aug 2018 |
| Externally published | Yes |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 9 Industry, Innovation, and Infrastructure
Keywords
- aspect ratio trapping
- defect formation
- ECCI
- hetero-epitaxy
- III/V on Si
- metamorphic buffer
- monolithic integration
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