III-V MOSFETs for sub-15 nm technology generation CMOS: Some observations, issues and solutions

  • Iain Thayne
  • , Xu Li
  • , Wout Jansen
  • , Ian Povey
  • , Eamon O'Connor
  • , Martin Pemble
  • , Paul Hurley
  • , Jaesoo Ahn
  • , Paul McIntyre

Research output: Chapter in Book/Report/Conference proceedingsConference proceedingpeer-review

Abstract

The high electron mobility of compound semiconductor materials can result in high velocity and low backscatter electrons being injected at the source side of a III-V nMOSFET. In combination, these factors have the potential to meet the highly challenging performance metrics of the International Technology Roadmap for Semiconductors (ITRS) [1] beyond the 15 nm technology generation, in particular the need to reduce supply voltages towards 0.5 V. This paper highlights a number of the significant challenges which have to be addressed if III-V MOSFETs are to be a credible solution to enable continued scaling of the ITRS beyond 2018.

Original languageEnglish
Title of host publication2012 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2012
Publication statusPublished - 2012
Event27th International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2012 - Boston, MA, United States
Duration: 23 Apr 201226 Apr 2012

Publication series

Name2012 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2012

Conference

Conference27th International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2012
Country/TerritoryUnited States
CityBoston, MA
Period23/04/1226/04/12

Keywords

  • III-V MOSFETs
  • Si compatible process modules

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