Implementation of statistical characterization and design techniques for an industrial 0.5 μm CMOS technology

Sharon Healy; Edel Horan; Kevin McCarthy; Alan Mathewson; Zhenqiu Ning; Erik Rombouts; Wim Vanderbauwhede; Marnix Tack

Implementation of statistical characterization and design techniques for an industrial 0.5 μm CMOS technology

Sharon Healy
, Edel Horan
, Kevin McCarthy
, Alan Mathewson
, Zhenqiu Ning
, Erik Rombouts
, Wim Vanderbauwhede
, Marnix Tack

School of Engineering and Architecture

Research output: Contribution to conference › Paper › peer-review

Abstract

This paper presents a methodology for statistical worst-case simulation using the BSIM3v3 model within commercially available tools. Statistical techniques such as Principal Component Analysis and Box-Behnken designs are used to generate a subset of models which reflect the variation of measured device performance. These worst-case corners can be used in circuit simulation to account for the effects of statistical fluctuation on circuit performance. An indication of key process parameters that need to be monitored and controlled is also provided.

Original language	English
Pages	227-232
Number of pages	6
Publication status	Published - 1999
Event	Proceedings of the 1999 International Conference on Microelectronic Test Structures, ICMTS 1999 - Goteborg, Swed Duration: 15 Mar 1999 → 18 Mar 1999

Conference

Conference	Proceedings of the 1999 International Conference on Microelectronic Test Structures, ICMTS 1999
City	Goteborg, Swed
Period	15/03/99 → 18/03/99

Cite this

@conference{8d3c1f89f7744e7fa3363bab29068084,

title = "Implementation of statistical characterization and design techniques for an industrial 0.5 μm CMOS technology",

abstract = "This paper presents a methodology for statistical worst-case simulation using the BSIM3v3 model within commercially available tools. Statistical techniques such as Principal Component Analysis and Box-Behnken designs are used to generate a subset of models which reflect the variation of measured device performance. These worst-case corners can be used in circuit simulation to account for the effects of statistical fluctuation on circuit performance. An indication of key process parameters that need to be monitored and controlled is also provided.",

author = "Sharon Healy and Edel Horan and Kevin McCarthy and Alan Mathewson and Zhenqiu Ning and Erik Rombouts and Wim Vanderbauwhede and Marnix Tack",

year = "1999",

language = "English",

pages = "227--232",

note = "Proceedings of the 1999 International Conference on Microelectronic Test Structures, ICMTS 1999 ; Conference date: 15-03-1999 Through 18-03-1999",

}

Healy, S, Horan, E, McCarthy, K, Mathewson, A, Ning, Z, Rombouts, E, Vanderbauwhede, W & Tack, M 1999, 'Implementation of statistical characterization and design techniques for an industrial 0.5 μm CMOS technology', Paper presented at Proceedings of the 1999 International Conference on Microelectronic Test Structures, ICMTS 1999, Goteborg, Swed, 15/03/99 - 18/03/99 pp. 227-232.

Implementation of statistical characterization and design techniques for an industrial 0.5 μm CMOS technology. / Healy, Sharon; Horan, Edel; McCarthy, Kevin et al.
1999. 227-232 Paper presented at Proceedings of the 1999 International Conference on Microelectronic Test Structures, ICMTS 1999, Goteborg, Swed.

Research output: Contribution to conference › Paper › peer-review

TY - CONF

T1 - Implementation of statistical characterization and design techniques for an industrial 0.5 μm CMOS technology

AU - Healy, Sharon

AU - Horan, Edel

AU - McCarthy, Kevin

AU - Mathewson, Alan

AU - Ning, Zhenqiu

AU - Rombouts, Erik

AU - Vanderbauwhede, Wim

AU - Tack, Marnix

PY - 1999

Y1 - 1999

N2 - This paper presents a methodology for statistical worst-case simulation using the BSIM3v3 model within commercially available tools. Statistical techniques such as Principal Component Analysis and Box-Behnken designs are used to generate a subset of models which reflect the variation of measured device performance. These worst-case corners can be used in circuit simulation to account for the effects of statistical fluctuation on circuit performance. An indication of key process parameters that need to be monitored and controlled is also provided.

AB - This paper presents a methodology for statistical worst-case simulation using the BSIM3v3 model within commercially available tools. Statistical techniques such as Principal Component Analysis and Box-Behnken designs are used to generate a subset of models which reflect the variation of measured device performance. These worst-case corners can be used in circuit simulation to account for the effects of statistical fluctuation on circuit performance. An indication of key process parameters that need to be monitored and controlled is also provided.

UR - https://www.scopus.com/pages/publications/0032664934

M3 - Paper

AN - SCOPUS:0032664934

SP - 227

EP - 232

T2 - Proceedings of the 1999 International Conference on Microelectronic Test Structures, ICMTS 1999

Y2 - 15 March 1999 through 18 March 1999

ER -

Implementation of statistical characterization and design techniques for an industrial 0.5 μm CMOS technology

Abstract

Conference

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