@inproceedings{a188ace73be148f7a70a7dca290fb739,
title = "Integration of InGaAs channel n-MOS devices on 200mm Si wafers using the aspect-ratio-trapping technique",
abstract = "We report on the fabrication on InGaAs/InP implant free quantum well (IFQW) n-MOSFET devices on 200mm wafers in a Si CMOS processing environment. The starting virtual InP substrates were prepared by means of the aspect-ratio-trapping technique. Post CMP these substrate resulted in a planar substrate with a rms roughness of 0.32 nm. After channel and gate processing source drain regions were formed by the selective epitaxial growth of Si doped InGaAs. Contact to the source/drain regions was made by a standard W-plug/metal 1 process. The contact resistance was estimated to be on the order of 7×10-7 Ω.cm2. Fully processed devices clearly showed gate modulation albeit on top of high levels of source to drain leakage. The source of this leakage was determined to be the result of the unintentional background doping of the InP buffer layer. Simulations show that the inclusion of the p-InAlAs between the InP and InGaAs can effectively suppress this leakage. This development is a significant step towards the integration of InGaAs based devices on a standard CMOS platform.",
author = "Niamh Waldron and Gang Wang and Nguyen, \{Ngoc Duy\} and Tommaso Orzali and Clement Merckling and Guy Brammertz and Patrick Ong and Gillis Winderickx and Geert Hellings and Geert Eneman and Matty Caymax and Marc Meuris and Naoto Horiguchi and Aaron Thean",
year = "2012",
doi = "10.1149/1.3700460",
language = "English",
isbn = "9781566779562",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "4",
pages = "115--128",
booktitle = "Graphene, Ge/III-V, Nanowires, and Emerging Materials for Post-CMOS Applications 4",
address = "United States",
edition = "4",
note = "4th International Symposium on Graphene, Ge/III-V and Emerging Materials for Post-CMOS Applications - 221st ECS Meeting ; Conference date: 06-05-2012 Through 10-05-2012",
}