Intrinsic advantages of SOI multiple-gate MOSFET (MuGFET) for low power applications

  • Weize Xiong
  • , C. Rinn Cleavelin
  • , Che Hua Hsu
  • , Mike Ma
  • , K. Schruefer
  • , Klaus Von Armin
  • , T. Schulz
  • , I. Cayrefourcq
  • , C. Mazure
  • , P. Patruno
  • , M. Kennard
  • , Kyoungsub Shin
  • , Xin Sun
  • , Tsu Jae King Liu
  • , K. Cherkaoui
  • , J. P. Colinge

Research output: Chapter in Book/Report/Conference proceedingsChapterpeer-review

Abstract

MuGFET structure improves local transistor mismatch compared to planar bulk MOSFET. This enables further SRAM cell size reduction. GIDL current is well controlled even with a mid-gap metal gate MuGFETs have low subthreshold leakage if Lg/Wsi ratio is kept above 1.5. The advantage of MuGFET subthreshold leakage suppression is even more pronounced at higher temperatures. Furthermore MuGFETs are compatible with local strain techniques to improve carrier mobility. The aforementioned qualities, along with low manufacturing cost of single mid-band-gap metal gate, make MuGFET a good candidate to replace planar bulk MOSFET for Low-Power Applications

Original languageEnglish
Title of host publicationECS Transactions - 13th International Symposium on Silicon-On-Insulator Technology and Devices
PublisherElectrochemical Society Inc.
Pages59-69
Number of pages11
Edition4
ISBN (Electronic)9781566775533
ISBN (Print)9781566775533
DOIs
Publication statusPublished - 2007
Event13th International Symposium on Silicon-On-Insulator Technology and Devices - 211th ECS Meeting - Chicago, IL, United States
Duration: 6 May 200711 May 2007

Publication series

NameECS Transactions
Number4
Volume6
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Conference

Conference13th International Symposium on Silicon-On-Insulator Technology and Devices - 211th ECS Meeting
Country/TerritoryUnited States
CityChicago, IL
Period6/05/0711/05/07

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