Intrinsic mismatch between floating-gate nonvolatile memory cell and equivalent transistor

The matching performance of nonvolatile memory cells and their equivalent transistors is investigated using a novel matching-performance factor. Extensive measurements on three technologies show that matching pairs can be found, but there is an inherent mobility mismatch between the equivalent transistor and the memory cell. It is suggested that the cause of this mismatch is due to the necessary layout differences between the cell and the equivalent transistor that can cause different levels of plasma-induced damage in the structures.