Inverse modelling of trapped charge in hot-carrier stressed nMOSFET

  • R. Duane
  • , A. Concannon
  • , D. McCarthy
  • , A. Mathewson

Research output: Chapter in Book/Report/Conference proceedingsConference proceedingpeer-review

Abstract

A new inverse modelling technique for extracting the spatial distribution of localised interface states after hot-carrier stress is presented. This technique shows for the first time quantitative agreement between measured and simulated currents in the subthreshold and weak inversion regions of operation during stress for the full range of drain, gate and bulk biases.

Original languageEnglish
Title of host publicationESSDERC 2000 - Proceedings of the 30th European Solid-State Device Research Conference
EditorsH. Grunbacher, Gabriel M. Crean, W. A. Lane, Frank A. McCabe
PublisherIEEE Computer Society
Pages368-371
Number of pages4
ISBN (Electronic)2863322486
ISBN (Print)9782863322482
DOIs
Publication statusPublished - 2000
Event30th European Solid-State Device Research Conference, ESSDERC 2000 - Cork, Ireland
Duration: 11 Sep 200013 Sep 2000

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876

Conference

Conference30th European Solid-State Device Research Conference, ESSDERC 2000
Country/TerritoryIreland
CityCork
Period11/09/0013/09/00

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