@inproceedings{ee3b6b947d7042179b640639eb810833,
title = "Low-leakage ultra-scaled junctions in MOS devices; from fundamentals to improved device performance",
abstract = "The aim of this work is to design ultra-scaled low-leakage junctions suitable for metal-oxide-semiconductor device scaling in bulk silicon. We begin with fundamental diode characterization analysis. Electrical behavior of fabricated diodes is then used to validate our device simulation modeling methodology, where established models are used to gain further insight and understanding in the junction leakage problem. Based on that effort, innovative junction scaling solutions are generated and realized in a silicon device experiment. Finally improved transistor performance is demonstrated. copyright The Electrochemical Society.",
author = "R. Duffy and A. Heringa and J. Loo and E. Augendre and S. Severi and G. Curatola",
year = "2006",
doi = "10.1149/1.2356261",
language = "English",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "2",
pages = "19--33",
booktitle = "Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2",
address = "United States",
edition = "2",
note = "Advanced Gate Stack, Source/Drain, and Channel Engineering fo Si-Based CMOS 2: New Materials, Processes, and Equipment - 210th Electrochemical Society Meeting ; Conference date: 29-10-2006 Through 03-11-2006",
}