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Low power elliptic curve cryptography

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Abstract

The designer of an elliptic curve processor is faced with many design choices that include the algorithm and coordinate system to be used. The power consumption of elliptic curve processors is becoming increasingly important as such processors find new uses in power constrained environments. This paper studies the effect that algorithm and coordinate choices have on the power consumption and energy per point multiplication of an FPGA based, reconfigurable elliptic curve processor.

Original languageEnglish
Title of host publicationIntegrated Circuit and System Design
Subtitle of host publicationPower and Timing Modeling, Optimization and Simulation - 17th International Workshop, PATMOS 2007, Proceedings
PublisherSpringer Verlag
Pages310-319
Number of pages10
ISBN (Print)9783540744412
DOIs
Publication statusPublished - 2007
Event17th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2007 - Gothenburg, Sweden
Duration: 3 Sep 20075 Sep 2007

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume4644 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference17th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2007
Country/TerritorySweden
CityGothenburg
Period3/09/075/09/07

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